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From:   "Tian, Kevin" <kevin.tian@intel.com>
To:     Jason Gunthorpe <jgg@nvidia.com>
CC:     Jean-Philippe Brucker <jean-philippe@linaro.org>,
        Li Zefan <lizefan@huawei.com>,
        "Jiang, Dave" <dave.jiang@intel.com>,
        "Raj, Ashok" <ashok.raj@intel.com>,
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        Tejun Heo <tj@kernel.org>,
        "cgroups@vger.kernel.org" <cgroups@vger.kernel.org>,
        "Wu, Hao" <hao.wu@intel.com>, David Woodhouse <dwmw2@infradead.org>
Subject: RE: [PATCH V4 05/18] iommu/ioasid: Redefine IOASID set and allocation
 APIs
Thread-Topic: [PATCH V4 05/18] iommu/ioasid: Redefine IOASID set and
 allocation APIs
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Date:   Wed, 12 May 2021 00:21:24 +0000
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> From: Jason Gunthorpe <jgg@nvidia.com>
> Sent: Wednesday, May 12, 2021 7:40 AM
>=20
> On Tue, May 11, 2021 at 10:51:40PM +0000, Tian, Kevin wrote:
> > > From: Jason Gunthorpe <jgg@nvidia.com>
> > > Sent: Tuesday, May 11, 2021 10:39 PM
> > >
> > > On Tue, May 11, 2021 at 09:10:03AM +0000, Tian, Kevin wrote:
> > >
> > > > 3) SRIOV, ENQCMD (Intel):
> > > > 	- "PASID global" with host-allocated PASIDs;
> > > > 	- PASID table managed by host (in HPA space);
> > > > 	- all RIDs bound to this ioasid_fd use the global pool;
> > > > 	- however, exposing global PASID into guest breaks migration;
> > > > 	- hybrid scheme: split local PASID range and global PASID range;
> > > > 	- force guest to use only local PASID range (through vIOMMU);
> > > > 	- for ENQCMD, configure CPU to translate local->global;
> > > > 	- for non-ENQCMD, setup both local/global pasid entries;
> > > > 	- uAPI for range split and CPU pasid mapping:
> > > >
> > > >     // set to "PASID global"
> > > >     ioctl(ioasid_fd, IOASID_SET_HWID_MODE, IOASID_HWID_GLOBAL);
> > > >
> > > >     // split local/global range, applying to all RIDs in this fd
> > > >     // Example: local [0, 1024), global [1024, max)
> > > >     // local PASID range is managed by guest and migrated as VM sta=
te
> > > >     // global PASIDs are re-allocated and mapped to local PASIDs po=
st
> > > migration
> > > >     ioctl(ioasid_fd, IOASID_HWID_SET_GLOBAL_MIN, 1024);
> > >
> > > I'm still not sold that ranges are the best idea here, it just adds
> > > more state that has to match during migration. Keeping the
> > > global/local split per RID seems much cleaner to me
> >
> > With ENQCMD the PASID is kept in CPU MSR, making it a process
> > context within the guest. When a guest process is bound to two
> > devices, the same local PASID must be usable on both devices.
> > Having per RID split cannot guarantee it.
>=20
> That is only for ENQCMD. All drivers know if they are ENQCMD
> compatible drivers and can ensure they use the global allocator
> consistently for their RIDs.
>=20
> Basically each RID knows based on its kernel drivers if it is a local
> or global RID and the ioasid knob can further fine tune this for any
> other specialty cases.

It's fine if you insist on this way. Then we leave it to userspace to
ensure same split range is used across devices when vIOMMU is
concerned. Please note such range split has to be enforced through
vIOMMU which (e.g. on VT-d) includes a register to report available
PASID space size (applying to all devices behind this vIOMMU) to=20
the guest. The kernel just follows per-RID split info. If anything broken,
the userspace just shoots its own foot.

>=20
> > > It does need some user visible difference because SIOV/mdev is not
> > > migratable. Only the kernel can select a PASID, userspace (and hence
> > > the guest) shouldn't have the option to force a specific PASID as the
> > > PASID space is shared across the entire RID to all VMs using the mdev=
.
> >
> > not migratable only when you choose exposing host-allocated PASID
> > into guest. However in the entire this proposal we actually virtualize
> > PASIDs, letting the guest manage its own PASID space in all
> > scenarios
>=20
> PASID cannot be virtualized without also using ENQCMD.
>=20
> A mdev that is using PASID without ENQCMD is non-migratable and this
> needs to be make visiable in the uAPI.
>=20

No. without ENQCMD the PASID must be programmed to a mdev MMIO
register. This operation is mediated then mdev driver can translate the
PASID from virtual to real.

Thanks
Kevin