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Miller" , Jakub Kicinski , Linux Kernel Mailing List , Linux Kernel Network Developers , "open list:ARM/Rockchip SoC..." Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 11, 2021 at 8:48 PM Andrew Lunn wrote: > > On Tue, May 11, 2021 at 06:59:13PM -0400, Peter Geis wrote: > > Add a driver for the Motorcomm yt8511 phy that will be used in the > > production Pine64 rk3566-quartz64 development board. > > It supports gigabit transfer speeds, rgmii, and 125mhz clk output. > > Hi Peter > > Please can you add minimal RGMII delay support. Trying to add it later > generally end up in backwards compatibility problems. It should be possible, yes. I experimented a bit with it but it just broke things. I'm still digging through the datasheet to find what is possible for this PHY. A lot of items should be set up via the device tree, though it seems this is a relatively unused concept in the net phy subsystem. As I'm relatively new to this subsystem I'm still learning as well. > > Do you know which one of the four RGMII modes your setup needs? Is the > PHY adding the Rx and Tx delays? So "rgmii-id"? By default it implements a 500ps delay internally on the txd clock and a 1.2 ns delay on the rx clock. The controller is the snps,dwmac-4.20a, and it implements a default delay as well. I'd like to eventually support as much as possible. For instance it seems to support cable testing. What I've done so far has been through trial and error, but I'd prefer a more scientific approach. I need to be able to test that functions work and would need someone who's experienced with network phys to assist. > > Andrew