Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp4811380pxj; Wed, 12 May 2021 13:54:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwNzyT5/VdYbrLpndyxEbBIelImSWB+THzh9hyU4tqzAD62oOLGHZliAwm2yPh0+nyfUHMn X-Received: by 2002:a17:906:b10e:: with SMTP id u14mr39346886ejy.546.1620852858649; Wed, 12 May 2021 13:54:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620852858; cv=none; d=google.com; s=arc-20160816; b=E0MM6Uhifhk+SzmsDPZeYW0T47QywSIlPrl9/8TWCgF1ZNcWTrQf4BDSB0M9TnDQOB 97lvQWYQQ/i2TGxxGEFzSFStXFro+3MzB7vb5K+mipJIgj60Go7iXr6adgG9ZW9A+GMc amuNWqRvOLOqZUIjlOR/OgVDtB+Pnt2lI+AKJ/ccAaGBf3DKKhaaYTDoc0MiRq3C3mzG 48CPQROEPmua+ydpkLwABhOmIrn8WluOAUlFc32rFVwAWzjJA6T3Uo78d4isZtQsPVtU n2hgfNK33louycDSEvC5kmuI4jqVk8BmkAiUvcI+rYb8OpzCyX7QF0H2+oOqAV9P2ruO G0Lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:user-agent:references:message-id :in-reply-to:subject:cc:to:from:date; bh=cbU3XT8vk6GStUPGtP6SDlmchSWxF5KYZ27GXSfPsN0=; b=0hL5pRGqsZiYC5NnxNUbS0fnm446eHgHYw2T8dYKNck6FxpJXFuYzAclOd9nZiCwg+ OGlaYSssqXdQ8+0ED+LhTkigCmxoVxpbLWmPhbtFUwkf+6o2hvQkaDWReiGdXvRjMIVy i+PFoPZwBu/jWanDA2uB/GQFVfTvEMDpPVnddkxQAPAjpM7H5Qmhbev0KSQfQabRL8EL QDK1/AcGAqIhr/gHPb33pwAslQvCnQawOJK3p/aX19kOpvdV4KmN3A5MgwxLI7vmp1XH MdduPBpDFr1yKaYFSN8TfRT8LxZfOVyGEUUZ+NaswuhFfqSYf98kIs6Z0KXCQqQigXlO Sacg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b15si961049ejq.293.2021.05.12.13.53.54; Wed, 12 May 2021 13:54:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345024AbhELUrK (ORCPT + 99 others); Wed, 12 May 2021 16:47:10 -0400 Received: from angie.orcam.me.uk ([78.133.224.34]:33044 "EHLO angie.orcam.me.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1387729AbhELUkB (ORCPT ); Wed, 12 May 2021 16:40:01 -0400 X-Greylist: delayed 915 seconds by postgrey-1.27 at vger.kernel.org; Wed, 12 May 2021 16:39:52 EDT Received: by angie.orcam.me.uk (Postfix, from userid 500) id A0F5392009C; Wed, 12 May 2021 22:38:24 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by angie.orcam.me.uk (Postfix) with ESMTP id 92EAA92009B; Wed, 12 May 2021 22:38:24 +0200 (CEST) Date: Wed, 12 May 2021 22:38:24 +0200 (CEST) From: "Maciej W. Rozycki" To: Linus Torvalds cc: Naresh Kamboju , Greg Kroah-Hartman , open list , Shuah Khan , Florian Fainelli , patches@kernelci.org, lkft-triage@lists.linaro.org, Jon Hunter , linux-stable , Pavel Machek , Andrew Morton , Guenter Roeck , clang-built-linux , Thomas Bogendoerfer , Huacai Chen Subject: Re: [PATCH 5.12 000/677] 5.12.4-rc1 review In-Reply-To: Message-ID: References: <20210512144837.204217980@linuxfoundation.org> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 12 May 2021, Linus Torvalds wrote: > Note that this might just be a random effect of inlining or other > register allocation pressure details. > > So it's possible that upstream builds mostly by luck. > > The "couldn't allocate output register" thing really does seem more > like a compiler issue than a kernel source code issue. Nope, `x' is the constraint for the multiply-divide unit/MDU accumulator register used for calculation output; there's only one, comprised of the HI and LO parts. This register was removed as from the MIPSr6 ISA, which I forgot that we support (unlike the microMIPSr6 ISA), in favour to using regular GPRs, in a slightly different manner. Rather than cluttering code with #ifdefs for the updated MIPSr6 divide and modulo instructions I chose to rewrite this piece in plain C, which actually makes pre-MIPSr6 code slightly better owing to better instruction scheduling (the pre-MIPSr6 MDU runs asynchronously and its output is only interlocked on read access to the accumulator register). NB I don't know if Clang actually supports the `x' constraint even with pre-MIPSr6 code; as it has turned out it has deficiencies compared to GCC with inline asm handling with the MIPS target. OTOH GCC has supported it since ~1991 if memory serves me, when MIPS support was initially added. Maciej