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From:   Dan Williams <dan.j.williams@intel.com>
Date:   Wed, 12 May 2021 20:03:03 -0700
Message-ID: <CAPcyv4hi-dx4kd4SLtj+AdorubofCPw+9-Lyq+6dNw9cN_nhGA@mail.gmail.com>
Subject: Re: [RFC v2 22/32] x86/boot: Avoid #VE during compressed boot for TDX platforms
To:     Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc:     Peter Zijlstra <peterz@infradead.org>,
        Andy Lutomirski <luto@kernel.org>,
        Dave Hansen <dave.hansen@intel.com>,
        Tony Luck <tony.luck@intel.com>,
        Andi Kleen <ak@linux.intel.com>,
        Kirill Shutemov <kirill.shutemov@linux.intel.com>,
        Kuppuswamy Sathyanarayanan <knsathya@kernel.org>,
        Raj Ashok <ashok.raj@intel.com>,
        Sean Christopherson <seanjc@google.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Sean Christopherson <sean.j.christopherson@intel.com>
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On Mon, Apr 26, 2021 at 11:03 AM Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>
> From: Sean Christopherson <sean.j.christopherson@intel.com>
>
> Avoid operations which will inject #VE during compressed
> boot, which is obviously fatal for TDX platforms.
>
> Details are,
>
>  1. TDX module injects #VE if a TDX guest attempts to write
>     EFER. So skip the WRMSR to set EFER.LME=1 if it's already
>     set. TDX also forces EFER.LME=1, i.e. the branch will always
>     be taken and thus the #VE avoided.

Ah here's the justification for that hunk in the previous patch, are
you sure that hunk belongs in the trampoline patch?

>
>  2. TDX module also injects a #VE if the guest attempts to clear
>     CR0.NE. Ensure CR0.NE is set when loading CR0 during compressed
>     boot. The Setting CR0.NE should be a nop on all CPUs that
>     support 64-bit mode.

Ah, here's the justification for CR0.NE in the previous patch. Did
something go wrong in the patch splitting?

>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
> Reviewed-by: Andi Kleen <ak@linux.intel.com>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> ---
>  arch/x86/boot/compressed/head_64.S | 5 +++--
>  arch/x86/boot/compressed/pgtable.h | 2 +-
>  2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
> index e94874f4bbc1..37c2f37d4a0d 100644
> --- a/arch/x86/boot/compressed/head_64.S
> +++ b/arch/x86/boot/compressed/head_64.S
> @@ -616,8 +616,9 @@ SYM_CODE_START(trampoline_32bit_src)
>         movl    $MSR_EFER, %ecx
>         rdmsr
>         btsl    $_EFER_LME, %eax
> +       jc      1f
>         wrmsr
> -       popl    %edx
> +1:     popl    %edx
>         popl    %ecx
>
>         /* Enable PAE and LA57 (if required) paging modes */
> @@ -636,7 +637,7 @@ SYM_CODE_START(trampoline_32bit_src)
>         pushl   %eax
>
>         /* Enable paging again */
> -       movl    $(X86_CR0_PG | X86_CR0_PE), %eax
> +       movl    $(X86_CR0_PG | X86_CR0_NE | X86_CR0_PE), %eax
>         movl    %eax, %cr0
>
>         lret
> diff --git a/arch/x86/boot/compressed/pgtable.h b/arch/x86/boot/compressed/pgtable.h
> index 6ff7e81b5628..cc9b2529a086 100644
> --- a/arch/x86/boot/compressed/pgtable.h
> +++ b/arch/x86/boot/compressed/pgtable.h
> @@ -6,7 +6,7 @@
>  #define TRAMPOLINE_32BIT_PGTABLE_OFFSET        0
>
>  #define TRAMPOLINE_32BIT_CODE_OFFSET   PAGE_SIZE
> -#define TRAMPOLINE_32BIT_CODE_SIZE     0x70
> +#define TRAMPOLINE_32BIT_CODE_SIZE     0x80
>
>  #define TRAMPOLINE_32BIT_STACK_END     TRAMPOLINE_32BIT_SIZE
>
> --
> 2.25.1
>