Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp345625pxj; Thu, 13 May 2021 06:23:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz87mieinFFx/4SLciDGERdAv3WRDDKJuN+V4TpeBCWcCnapNEi8DIE0OB+9UAy1Z2hS6Sz X-Received: by 2002:a05:6402:4305:: with SMTP id m5mr50093325edc.143.1620912198468; Thu, 13 May 2021 06:23:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620912198; cv=none; d=google.com; s=arc-20160816; b=Jm943YaNpFdsb2uFbJnLvb/UyDFbTlwI1osFk3mVozj8mwAd9o/r0nSRmHyzOvxX9l cRFHDe7mIKdZXWT73LFTwSd9BrzHR8TOXNZAiOWv8G5Lw5AIsK7nUibSYZj72mi/MPD+ tEfUY5RHGB/+fbiZPSH+KM0Q09JY5WFzUx+3aMdpbrRkHu1lYVErPwBPwp0hGSyK+Oh/ y/GFPP6LHhiEkR9lcdHWQpC39vXX1x3LLdmJKe8nVWatbFDorRYXjMqBSfVM6Z1Fynl0 gJCNkUM9KWKJonu/Nc0GQl5g9TumAiWK8xmXz652ziMgGnnnRYgSE43N8On08rBD5ens kX6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=OBc+6kO0IGJkBI345jIjEQh9CShLBZbw1bIfvzsfVqg=; b=hjNSH0aE308OvRoDhRDlVzK2G1Iec/bEraZD33eDccA6Dx819mHim9knLo0mEuzbMe xI7yVl+a+gAuxggqkiV4C5scSjCRcPAJ2W3yY8D4qS7hLjxR01ubehcgEMCmdptzw8/J rya75nf2jzbHZsgPihUsOHzP3yllSNTulMePTmMSVG7yp25cKpr7KAagcbbWqKesQgke JDSuDHDRbqtSuTllcNq1+yt+oo2tdMtFj+5k37D9efMBcThzTVPQGfvN+TOaXa/5Wxww yw+dIlM9Oj5W9hAZkdKIjavz0QM+NqQmHtXnBh3xoFWPg/733HT5zOa7qk4iA1rXRtVI FoEA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cb24si2852207edb.250.2021.05.13.06.22.52; Thu, 13 May 2021 06:23:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234000AbhEMNWj (ORCPT + 99 others); Thu, 13 May 2021 09:22:39 -0400 Received: from mx2.suse.de ([195.135.220.15]:51982 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233890AbhEMNWP (ORCPT ); Thu, 13 May 2021 09:22:15 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 19D96AE57; Thu, 13 May 2021 13:21:02 +0000 (UTC) From: Giovanni Gherdovich To: "Rafael J . Wysocki" , Viresh Kumar , Srinivas Pandruvada Cc: Len Brown , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Giovanni Gherdovich Subject: [PATCH v2] cpufreq: intel_pstate: Add Icelake servers support in no-HWP mode Date: Thu, 13 May 2021 15:20:51 +0200 Message-Id: <20210513132051.31465-1-ggherdovich@suse.cz> X-Mailer: git-send-email 2.26.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Users may disable HWP in firmware, in which case intel_pstate wouldn't load unless the CPU model is explicitly supported. Add ICELAKE_X to the list of CPUs that can register intel_pstate while not advertising the HWP capability. Without this change, an ICELAKE_X in no-HWP mode could only use the acpi_cpufreq frequency scaling driver. See also commit d8de7a44e11f ("cpufreq: intel_pstate: Add Skylake servers support"). Signed-off-by: Giovanni Gherdovich --- This replaces https://lore.kernel.org/lkml/20210513075930.22657-1-ggherdovich@suse.cz drivers/cpufreq/intel_pstate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index f0401064d7aa..28c9733e0dce 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -2087,6 +2087,7 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = { X86_MATCH(ATOM_GOLDMONT, core_funcs), X86_MATCH(ATOM_GOLDMONT_PLUS, core_funcs), X86_MATCH(SKYLAKE_X, core_funcs), + X86_MATCH(ICELAKE_X, core_funcs), {} }; MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); -- 2.26.2