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From:   "Joshi, Mukul" <Mukul.Joshi@amd.com>
To:     Borislav Petkov <bp@alien8.de>
CC:     "amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>,
        "Kasiviswanathan, Harish" <Harish.Kasiviswanathan@amd.com>,
        x86-ml <x86@kernel.org>, lkml <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] drm/amdgpu: Register bad page handler for Aldebaran
Thread-Topic: [PATCH] drm/amdgpu: Register bad page handler for Aldebaran
Thread-Index: AQHXRs6Uco2r7eCCPEW3XTp7lQLNb6rflw+AgACR7NCAAC6FAIAAV7jwgAB+vQCAAG5mgA==
Date:   Thu, 13 May 2021 23:10:34 +0000
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[AMD Official Use Only - Internal Distribution Only]


> -----Original Message-----
> From: Borislav Petkov <bp@alien8.de>
> Sent: Thursday, May 13, 2021 5:53 AM
> To: Joshi, Mukul <Mukul.Joshi@amd.com>
> Cc: amd-gfx@lists.freedesktop.org; Kasiviswanathan, Harish
> <Harish.Kasiviswanathan@amd.com>; x86-ml <x86@kernel.org>; lkml <linux-
> kernel@vger.kernel.org>
> Subject: Re: [PATCH] drm/amdgpu: Register bad page handler for Aldebaran
>=20
> [CAUTION: External Email]
>=20
> On Thu, May 13, 2021 at 03:20:36AM +0000, Joshi, Mukul wrote:
> > Exporting smca_get_bank_type() works fine when CONFIG_X86_MCE_AMD is
> defined.
> > I would need to put #ifdef CONFIG_X86_MCE_AMD in my code to compile
> > the amdgpu driver when CONFIG_X86_MCE_AMD is not defined.
> > I can avoid all that by using is_smca_umc_v2().
> > I think it would be cleaner with using is_smca_umc_v2().
>=20
> See how smca_get_long_name() is exported and export that function the sam=
e
> way.
>=20

That's probably not the best example to look at.
smca_get_long_name() is used in drivers/edac/mce_amd.c and this file doesn'=
t
get compiled when CONFIG_X86_MCE_AMD is not defined.

And amdgpu driver has no dependency on CONFIG_X86_MCE_AMD.

So here is one option that we can try:
1. Export smca_get_bank_type().
2. I wrap my entire code in GPU driver with #ifdef CONFIG_X86_MCE_AMD

Will that work for you?

Thanks,
Mukul

> To save you some energy: is_smca_umc_v2() is not going to happen.


>=20
> > You can think of GPU device as a EDAC device here. It is mainly
> > interested in handling uncorrectable errors.
>=20
> An EDAC "device", as you call it, is not interested in handling UEs. If a=
nything, it
> counts them.
>=20
> > It is a deferred interrupt that generates an MCE.
>=20
> Is that the same deferred interrupt which calls amd_deferred_error_interr=
upt() ?
>=20
> > When an uncorrectable error is detected on the GPU UMC, all we are
> > doing is determining the physical address where the error occurred and
> > then "retiring" the page that address belongs to.
>=20
> What page is that? Normal DRAM page or a page in some special GPU memory?
>=20
> > By retiring, we mean we reserve the page so that it is not available
> > for allocations to any applications.
>=20
> We do that for normal DRAM memory pages by poisoning them. I hope you
> don't mean that.
>=20
> Looking at
>=20
> amdgpu_ras_add_bad_pages
> |-> amdgpu_vram_mgr_reserve_range
>=20
> that's some VRAM thing so I'm guessing special memory on the GPU.
>=20
> If so, what happens with all those "retired" pages when you reboot?
> They're getting used again and potentially trigger the same UEs and the s=
ame
> retiring happens?
>=20
> > We are providing information to the user by storing all the
> > information about the retired pages in EEPROM. This can be accessed
> > through sysfs.
>=20
> Ok, I'm a user and I can access that information through sysfs. What can =
I do
> with it?
>=20
> > Hope it clears what "bad page retirement" is achieving.
>=20
> It is getting there.
>=20
> Thx.
>=20
> --
> Regards/Gruss,
>     Boris.
>=20
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e.
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