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From:   Heiko Stuebner <heiko@sntech.de>
To:     mturquette@baylibre.com,
        "Elaine@vger.kernel.org" <Elaine@vger.kernel.org>, sboyd@kernel.org
Cc:     Heiko Stuebner <heiko@sntech.de>,
        linux-arm-kernel@lists.infradead.org,
        Elaine Zhang <zhangqing@rock-chips.com>,
        linux-clk@vger.kernel.org, kever.yang@rock-chips.com,
        huangtao@rock-chips.com, tony.xie@rock-chips.com,
        linux-kernel@vger.kernel.org, finley.xiao@rock-chips.com,
        linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v1] clk: rockchip: Optimize PLL table memory usage
Date:   Fri, 14 May 2021 14:05:56 +0200
Message-Id: <162099394917.1964929.5627318553471535848.b4-ty@sntech.de>
In-Reply-To: <20210511090726.15146-1-zhangqing@rock-chips.com>
References: <20210511090726.15146-1-zhangqing@rock-chips.com>
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On Tue, 11 May 2021 17:07:26 +0800, Elaine@vger.kernel.org wrote:
> Before the change: The sizeof rk3568_pll_rates = 2544
> Use union: The sizeof rk3568_pll_rates = 1696
> 
> In future Soc, more PLL types will be added, and the
> rockchip_pll_rate_table will add more members,
> and the space savings will be even more pronounced
> by using union.

Applied, thanks!

[1/1] clk: rockchip: Optimize PLL table memory usage
      commit: 23029150a05b59ebacca6dd76f6c14dc67a95877

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>