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([2a0b:e7c0:0:107::70f]) by smtp.gmail.com with ESMTPSA id n12sm756976edr.84.2021.05.17.01.25.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 May 2021 01:25:47 -0700 (PDT) Subject: Re: [PATCH] serial/liteuart; Add support for earlycon To: Stafford Horne Cc: LKML , Florent Kermarrec , Mateusz Holenko , Joel Stanley , "Gabriel L . Somlo" , Jonathan Corbet , Greg Kroah-Hartman , Karol Gugala , "Paul E. McKenney" , Randy Dunlap , Andrew Morton , Thomas Gleixner , Viresh Kumar , Mike Kravetz , Peter Zijlstra , linux-doc@vger.kernel.org, linux-serial@vger.kernel.org References: <20210515084519.167343-1-shorne@gmail.com> From: Jiri Slaby Message-ID: Date: Mon, 17 May 2021 10:25:46 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=iso-8859-2; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17. 05. 21, 10:23, Stafford Horne wrote: > On Mon, May 17, 2021 at 10:16:43AM +0200, Jiri Slaby wrote: >> On 15. 05. 21, 10:45, Stafford Horne wrote: >>> Most litex boards using RISC-V soft cores us the sbi earlycon, however >>> this is not available for non RISC-V litex SoC. This patch enables >>> earlycon for liteuart which is available on all Litex SoC's making >>> support for earycon debugging more widely available. >>> >>> Signed-off-by: Stafford Horne >>> Cc: Florent Kermarrec >>> Cc: Mateusz Holenko >>> Cc: Joel Stanley >>> Cc: Gabriel L. Somlo >>> --- >>> .../admin-guide/kernel-parameters.txt | 5 +++ >>> drivers/tty/serial/Kconfig | 1 + >>> drivers/tty/serial/liteuart.c | 31 +++++++++++++++++++ >>> 3 files changed, 37 insertions(+) >>> >>> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt >>> index 04545725f187..2d4a43af8de2 100644 >>> --- a/Documentation/admin-guide/kernel-parameters.txt >>> +++ b/Documentation/admin-guide/kernel-parameters.txt >>> @@ -1084,6 +1084,11 @@ >>> the driver will use only 32-bit accessors to read/write >>> the device registers. >>> + liteuart, >>> + Start an early console on a litex serial port at the >>> + specified address. The serial port must already be >>> + setup and configured. Options are not yet supported. >>> + >>> meson, >>> Start an early, polled-mode console on a meson serial >>> port at the specified address. The serial port must >>> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig >>> index 0c4cd4a348f4..9ceffe6ab6fd 100644 >>> --- a/drivers/tty/serial/Kconfig >>> +++ b/drivers/tty/serial/Kconfig >>> @@ -1531,6 +1531,7 @@ config SERIAL_LITEUART >>> depends on OF || COMPILE_TEST >>> depends on LITEX >>> select SERIAL_CORE >>> + select SERIAL_EARLYCON >>> help >>> This driver is for the FPGA-based LiteUART serial controller from LiteX >>> SoC builder. >>> diff --git a/drivers/tty/serial/liteuart.c b/drivers/tty/serial/liteuart.c >>> index 64842f3539e1..38c472487e68 100644 >>> --- a/drivers/tty/serial/liteuart.c >>> +++ b/drivers/tty/serial/liteuart.c >>> @@ -372,6 +372,37 @@ static int __init liteuart_console_init(void) >>> console_initcall(liteuart_console_init); >>> #endif /* CONFIG_SERIAL_LITEUART_CONSOLE */ >>> +#ifdef CONFIG_SERIAL_EARLYCON >>> +static void early_liteuart_putc(struct uart_port *port, int c) >>> +{ >>> + while (litex_read8(port->membase + OFF_TXFULL)) >>> + cpu_relax(); >>> + >>> + litex_write8(port->membase + OFF_RXTX, c); >> >> Hi, >> >> am I missing something or this doesn't differ to liteuart_putchar? > > Hi, No you are right, I missed that thanks for catching it. > > I should be able to remove this function and use putchar below. OK. I've just noticed you add an ifdef CONFIG_SERIAL_EARLYCON here, but you select SERIAL_EARLYCON in Kconfig above. So the ifdef is sort of pointless? (Or you shouldn't select SERIAL_EARLYCON.) thanks, -- js suse labs