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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id 2sm3408945ota.67.2021.05.17.14.46.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 May 2021 14:46:08 -0700 (PDT) Received: (nullmailer pid 3258346 invoked by uid 1000); Mon, 17 May 2021 21:46:07 -0000 Date: Mon, 17 May 2021 16:46:07 -0500 From: Rob Herring To: Stephen Boyd Cc: Andy Gross , Bjorn Andersson , Dmitry Baryshkov , Kishon Vijay Abraham I , Rob Clark , Vinod Koul , sbillaka@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] dt-bindings: phy: Introduce Qualcomm eDP/DP PHY binding Message-ID: <20210517214607.GA3253863@robh.at.kernel.org> References: <20210511041930.592483-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 11, 2021 at 10:24:06AM -0700, Stephen Boyd wrote: > Quoting Bjorn Andersson (2021-05-10 21:19:29) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml > > new file mode 100644 > > index 000000000000..c258e4f7e332 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml > > @@ -0,0 +1,69 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > + > > +%YAML 1.2 > > +--- > > +$id: "http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#" > > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > > + > > +title: Qualcomm DP/eDP PHY > > + > > +maintainers: > > + - Bjorn Andersson > > + > > +description: > > + The Qualcomm DP/eDP PHY is found in a number of Qualcomm platform and > > + provides the physical interface for DisplayPort and Embedded Display Port. > > + > > +properties: > > + compatible: > > + enum: > > + - qcom,sc8180x-dp-phy > > + - qcom,sc8180x-edp-phy Is there a difference in DP and eDP? > > + > > + reg: > > + items: > > + - description: PHY base register block > > + - description: tx0 register block > > + - description: tx1 register block > > + - description: PLL register block > > + > > + clocks: > > + maxItems: 2 > > Can this be items: - const: again? I think having maxItems means you can > have one or two items, which wouldn't match the number of clock-names > then. No, it's implicitly 'minItems: 2'. But you can have 'items' if a description of each clock is useful. > > > + > > + clock-names: > > + items: > > + - const: aux > > + - const: cfg_ahb > > +