Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1354792pxj; Wed, 19 May 2021 04:17:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwCjC55IRnYLSUojd0/C1EnAJ/l+2eh7T2wsBSPgDbOBMMzI+N6l9BSVwfvzp5mvUCBO9Fa X-Received: by 2002:a92:d48e:: with SMTP id p14mr9610809ilg.33.1621423077224; Wed, 19 May 2021 04:17:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621423077; cv=none; d=google.com; s=arc-20160816; b=eLsvR3RYJkblTJsSyCM9mM8gYN/PHvoE0uHIWsLVkQQ73OzVd8Nwa5zRLwquQbeYpU bES0+t0/5REXxcjymW08E4rRt2fh9jCeEzbACCSoaq/zslUPKDQ06xdOUKB3EBBpR8JP JVY3kuI3HUDqRRMxNsJRZ+9J9EcCSnBXl/U/snLKYAq7ySmvOzFXolQZEuxbU5/D5JPc pbYTlOPYIfi9CS7EKWYg0M3aqbWJBJPe1EWwj6ewPj1i7miywnRAFksp9AiDpafrz+SH PackNeMheRfa6jfDnCc3myWTTGZvf6Yw1oO4hEbRLCloiYkWBbwfQz6s8JBx0dUODc+x steQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=YDGF/XsZHCLcmCjch90Vpft0mWvLuYXnUPfsQiN/PbY=; b=Sge4kNSadGc50x5KixyA9Ngn4t/bNXUyYwNR+Mt0C+yI5I6hsGzSDdKu3RZRLM+O/H bLAYzd47lESsCpSVQLG1hnEL3YSKN4XRNtpEtGY+VrwTgxM61zkk957k/i7mVT0WW11o XCrQl8foik9404mM3vD7XDJBf8TfSgp+B+zYlYsK3eExpbE2Shd+ppiS4BTkQKacczhR C6FK5Va6EedHpyCOQXrBVv+eAFd3B00Ey1kHzu8DSzPrB0LEnLmM+ahOAUJldRElZOew xHLsqtDERGbMgCQvZprPLFifeMk87p0OIf13ydjH7fnJ8L8SoH7ntuK7jR4D7WvnpJRQ yg/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=SueK3RIu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u12si24357777jak.73.2021.05.19.04.17.43; Wed, 19 May 2021 04:17:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=SueK3RIu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239097AbhERBmI (ORCPT + 99 others); Mon, 17 May 2021 21:42:08 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:44746 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238427AbhERBmH (ORCPT ); Mon, 17 May 2021 21:42:07 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=YDGF/XsZHCLcmCjch90Vpft0mWvLuYXnUPfsQiN/PbY=; b=SueK3RIuW+4DzbiBy3mCGFxX9k tfzB2U5RBUWHDgWO7aRUP369doADWzBisAsKI5uFA7B8K/pyRBis/ZfAOAAN6vUwmnhNx6XyRocRs JGG7cWn1f+qWGcmtOyVSoH4tgcv02GYw6Zk/ABybsnB7eDLRppo6AorQ/yBmW8toq9+c=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1lioit-004fCg-NP; Tue, 18 May 2021 03:40:39 +0200 Date: Tue, 18 May 2021 03:40:39 +0200 From: Andrew Lunn To: Sander Vanheule Cc: Pavel Machek , Rob Herring , Lee Jones , Mark Brown , Greg Kroah-Hartman , "Rafael J . Wysocki" , Michael Walle , Linus Walleij , Bartosz Golaszewski , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, Andy Shevchenko , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/7] gpio: regmap: Add configurable dir/value order Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 17, 2021 at 09:28:04PM +0200, Sander Vanheule wrote: > GPIO chips may not support setting the output value when a pin is > configured as an input Could you describe what happens with the hardware you are playing with. Not being able to do this means you will get glitches when enabling the output so you should not use these GPIOs with bit banging busses like i2c. Andrew