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[31.30.174.132]) by smtp.gmail.com with ESMTPSA id d15sm8128909eds.68.2021.05.18.00.50.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 May 2021 00:50:29 -0700 (PDT) Date: Tue, 18 May 2021 09:50:27 +0200 From: Andrew Jones To: Salil Mehta Cc: "wangyanan (Y)" , Peter Maydell , "Michael S . Tsirkin" , Igor Mammedov , Shannon Zhao , Alistair Francis , David Gibson , "qemu-devel@nongnu.org" , "qemu-arm@nongnu.org" , Paolo Bonzini , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , yangyicong , "Zengtao (B)" , "Song Bao Hua (Barry Song)" , "Wanghaibin (D)" , zhukeqian , yuzenghui , "linux-kernel@vger.kernel.org" , "linuxarm@openeuler.org" Subject: Re: [RFC PATCH v3 4/9] hw/arm/virt: Initialize the present cpu members Message-ID: <20210518075027.wjpdjvoam7dlzign@gator.home> References: <20210516102900.28036-1-wangyanan55@huawei.com> <20210516102900.28036-5-wangyanan55@huawei.com> <6c8f9c3502384f648f30c7381e87dda9@huawei.com> <68883a1b-5303-da13-a051-e909e1d1f71b@huawei.com> <6d8b9142e8a34d1390f2f0b4bfb53a00@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <6d8b9142e8a34d1390f2f0b4bfb53a00@huawei.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 18, 2021 at 07:04:51AM +0000, Salil Mehta wrote: > > From: wangyanan (Y) > > Sent: Tuesday, May 18, 2021 5:43 AM > > > > Hi Salil, > > > > On 2021/5/18 4:48, Salil Mehta wrote: > > >> From: Qemu-arm > > [mailto:qemu-arm-bounces+salil.mehta=huawei.com@nongnu.org] > > >> On Behalf Of Yanan Wang > > >> Sent: Sunday, May 16, 2021 11:29 AM > > >> To: Peter Maydell ; Andrew Jones > > >> ; Michael S . Tsirkin ; Igor Mammedov > > >> ; Shannon Zhao ; Alistair > > >> Francis ; David Gibson > > >> ; qemu-devel@nongnu.org; qemu-arm@nongnu.org > > >> Cc: Song Bao Hua (Barry Song) ; zhukeqian > > >> ; yangyicong ; Zengtao (B) > > >> ; Wanghaibin (D) ; > > >> yuzenghui ; Paolo Bonzini ; > > >> Philippe Mathieu-Daud? > > >> Subject: [RFC PATCH v3 4/9] hw/arm/virt: Initialize the present cpu members > > >> > > >> We create and initialize a cpuobj for each present cpu in > > >> machvirt_init(). Now we also initialize the cpu member of > > >> structure CPUArchId for each present cpu in the function. > > > [...] > > > > > >> qdev_realize(DEVICE(cpuobj), NULL, &error_fatal); > > >> + > > >> + /* > > >> + * As ARM cpu hotplug is not supported yet, we initialize > > >> + * the present cpu members here. > > >> + */ > > >> + machine->possible_cpus->cpus[n].cpu = cpuobj; > > > > > > when vcpu Hotplug is not supported yet, what necessitates this change now? > > > > > The initialization will gives a way to determine whether a CPU is > > present or not. > > At least, for now it will be used when generating ACPI tables, e.g. > > DSDT, MADT. > > See patch 5 and 6. > > yes, but why do you require it now as part of the vcpu topology change? > > As-far-as-i-can-see, PPTT table changes(part of patch 5/9) do not require > this change. Change in Patch 5/9 has also been done in anticipation of > some future requirement(vcpu Hotplug?). > > Please correct me here if I am wrong? > Hi Salil, The problem is that we've never required smp.cpus == smp.maxcpus, so a user could have smp.cpus < smp.maxcpus. We want the topology to match maxcpus, but only enable cpus. However, if you think we should just not allow cpus < maxcpus until hot plug is sorted out, then we could discuss a way of trying to enforce cpus == maxcpus, but I'm not sure how we can without breaking existing command lines. Thanks, drew