Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1652551pxj; Wed, 19 May 2021 10:40:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwwB7OqxR5owRBZ8dLBZeXl+0jZKZh+/D1lAq5t50XLjaihll2NAX2i9Hv3dhHDbs4ymFRg X-Received: by 2002:a5d:8a16:: with SMTP id w22mr657400iod.186.1621446042939; Wed, 19 May 2021 10:40:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621446042; cv=none; d=google.com; s=arc-20160816; b=NKwvSkD965IyltwYYQ+bNK3YP+pio0uxPEOF0t7pE6JmL1N7AOzcThz+cWHED+CWQx DdfJvM1a1IvdRRhUFQ8Pz5vq5c0V3tK1hsyDy9ZV3qojW/jAQAIJnr4KK2OWk3QJ+7gf dJbaGo5Xy2zqfVtRUNMvSAqv5Go4B02parOcVpvCuX2hKCsLDgJsYaiVwkVwoXn6CjU4 wFsjHUcjo9c2UE4W4ZjwREUzQNOgYC83JZHmYHZX7NmfPwDEfLnGBo1PhLwa9Rk8pDpU 7+ZbLIjqXO0pDeD8Vo9N8NWUuxHDG65alJYiZQLnBsWsGDtyrEKKWuFqFSrw1QTQ72cT LEDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from :dkim-signature; bh=NYkCFyg/J9YK0KU90WHGnXm9+RztNvxNW7BXV5KdyXw=; b=UFlkQCk8aGKa0LR/eA4HKRYExm1p4Oy5VyhdI7w7R3L+iRs1wMSRcqef5VnwiltnAh prOIYaenZdB2aEiJYVo1+Ja/bE3j5OLwxaBgOvEkHO/c433XmegyaxnKBeUgXvOAOLD3 NGRzFGosNMonvu+Na9JFYHZYCUUa+UmBBb5yCifPHg/hNYaV9yYMzCXOSIhEXRDmZ1uo Ik7pCQH3LTt85qC5Kywy1kmKfF/3yBpUcD0gy078iIDk8ZVtDH2xf3T/560EiSKC6z2G MqNDJI1kxKsGqSGAhqaJXfxjVhAL25T3Z7q0R9tNbRH8KoVMydLQGQsay1tD1TsTapSy r25g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=pjiD3jJO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a27si27591579jab.118.2021.05.19.10.40.29; Wed, 19 May 2021 10:40:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=pjiD3jJO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243110AbhERJnt (ORCPT + 99 others); Tue, 18 May 2021 05:43:49 -0400 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:8064 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242571AbhERJnr (ORCPT ); Tue, 18 May 2021 05:43:47 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 14I9MvPl010142; Tue, 18 May 2021 11:42:14 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=selector1; bh=NYkCFyg/J9YK0KU90WHGnXm9+RztNvxNW7BXV5KdyXw=; b=pjiD3jJOvymNxQYw/Edc/CTtVfMDjIcZz4m1827GZIN8N+4UEXar3/yFLhN/CKtVor8T +qjVpMcgaqfFvPMgLtP3lUwuRcOI+m9klihgOXZ6hD3WiUHGEd8zI7HF0wBFrl5lbwNy hEGYbrA3gIQ1AgMu6+r7C8TXSuY/YH9VGL8k2vifSZmcDD8wLdveGcdLnA//+sNmmMgT uX7bQ1GR9qDTRHCx7/IfmLd9LldYPAXZbz2DvpozKW3JvxJm/q3HsgihuZrAxsLSddmb 569x5b9sjitsvxieJ1LVc5jRyLk6thZVOid6UUtBXrjJ+bSE0YH12xzBvtBCECC0/mft 4A== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 38maunr4mw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 May 2021 11:42:14 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2228510002A; Tue, 18 May 2021 11:42:12 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 09E1921CA62; Tue, 18 May 2021 11:42:12 +0200 (CEST) Received: from localhost (10.75.127.45) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 18 May 2021 11:42:11 +0200 From: To: Mark Brown , Miquel Raynal , Vignesh Raghavendra , Boris Brezillon , , Alexandre Torgue , , , , CC: , Subject: [PATCH v3 0/3] MTD: spinand: Add spi_mem_poll_status() support Date: Tue, 18 May 2021 11:39:48 +0200 Message-ID: <20210518093951.23136-1-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.761 definitions=2021-05-18_04:2021-05-17,2021-05-18 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Patrice Chotard This series adds support for the spi_mem_poll_status() spinand interface. Some QSPI controllers allows to poll automatically memory status during operations (erase, read or write). This allows to offload the CPU for this task. STM32 QSPI is supporting this feature, driver update are also part of this series. Chnages in v3: - Add spi_mem_read_status() which allows to read 8 or 16 bits status. - Add initial_delay_us and polling_delay_us parameters to spi_mem_poll_status(). and also to poll_status() callback. - Move spi_mem_supports_op() in SW-based polling case. - Add delay before invoquing read_poll_timeout(). - Remove the reinit/wait_for_completion() added in v2. - Add initial_delay_us and polling_delay_us parameters to spinand_wait(). - Add SPINAND_READ/WRITE/ERASE/RESET_INITIAL_DELAY_US and SPINAND_READ/WRITE/ERASE/RESET_POLL_DELAY_US defines. - Remove spi_mem_finalize_op() API added in v2. Changes in v2: - Indicates the spi_mem_poll_status() timeout unit - Use 2-byte wide status register - Add spi_mem_supports_op() call in spi_mem_poll_status() - Add completion management in spi_mem_poll_status() - Add offload/non-offload case management in spi_mem_poll_status() - Optimize the non-offload case by using read_poll_timeout() - mask and match stm32_qspi_poll_status()'s parameters are 2-byte wide - Make usage of new spi_mem_finalize_op() API in stm32_qspi_wait_poll_status() Patrice Chotard (3): spi: spi-mem: add automatic poll status functions mtd: spinand: use the spi-mem poll status APIs spi: stm32-qspi: add automatic poll status feature drivers/mtd/nand/spi/core.c | 45 +++++++++++++------ drivers/spi/spi-mem.c | 85 ++++++++++++++++++++++++++++++++++++ drivers/spi/spi-stm32-qspi.c | 83 +++++++++++++++++++++++++++++++---- include/linux/mtd/spinand.h | 11 ++++- include/linux/spi/spi-mem.h | 14 ++++++ 5 files changed, 216 insertions(+), 22 deletions(-) -- 2.17.1