Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
MIME-Version: 1.0
References: <20210516135531.2203-1-dariobin@libero.it> <20210516135531.2203-2-dariobin@libero.it>
 <CAHp75Vd8875hRNk1JK6gkmfxjqxBSu4cRNE1zJt9TyEW7TvsMg@mail.gmail.com>
 <20210517225713.GB2936462@x1> <960608833.161310.1621330718253@mail1.libero.it>
 <CAPgEAj42Dvb=qHvViEMz4Uy0V0Ted5GCojLua0pVn4hZ850AGQ@mail.gmail.com>
In-Reply-To: <CAPgEAj42Dvb=qHvViEMz4Uy0V0Ted5GCojLua0pVn4hZ850AGQ@mail.gmail.com>
From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Tue, 18 May 2021 13:41:26 +0300
Message-ID: <CAHp75Vc_RUMEgcHVdS=pxryX9G_EboWcGOjES+quGXThLFRgbQ@mail.gmail.com>
Subject: Re: [PATCH 1/2] pinctrl: core: configure pinmux from pins debug file
To:     Drew Fustini <drew@beagleboard.org>
Cc:     Dario Binacchi <dariobin@libero.it>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

On Tue, May 18, 2021 at 1:22 PM Drew Fustini <drew@beagleboard.org> wrote:
> On Tue, May 18, 2021 at 2:38 AM Dario Binacchi <dariobin@libero.it> wrote:
> > > Il 18/05/2021 00:57 Drew Fustini <drew@beagleboard.org> ha scritto:
> > > On Mon, May 17, 2021 at 11:02:00PM +0300, Andy Shevchenko wrote:
> > > > On Sun, May 16, 2021 at 7:43 PM Dario Binacchi <dariobin@libero.it> wrote:

...

> > > > Drew, is it similar to what you are trying to achieve?
> > >
> > > Yes, I would say this similar to what I was trying to accomplish: being
> > > able to change contents of conf_<module>_<pin> register [table 9-60]
> > > from userspace.
> > >
> > > However, I was specifically looking to change bits 2:0 which is mux
> > > mode. My motivation was to allow BeagleBone users to easily switch
> > > between pin functions on the expansion headers during runtime to make
> > > rapid prototyping with a breadboard easier (such as changing header pin
> > > from GPIO to SPI mode). Most of the header pins have 7 different modes.
> > >
> > > Ultimately, the solution I settled on with feedback from this list was
> > > to create pinmux-select debugfs file that can activate desired fucntion:
> > > 6199f6becc86 ("pinctrl: pinmux: Add pinmux-select debugfs file")
> > >
> > > Bits 6:3 are related to what this subsystem would refer to as pin conf
> > > such as slew, input enable and bias. Thus it might make sense to expose
> > > something like a select-pinconf file to activate pin conf settings from
> > > userspace. This would require using 'pinconf-single' compatible.
> > >
> > > I fixed pinctrl-single bug regarding pinconf last year so it should be
> > > possible to use 'pinconf-single' compatible for the am33xx_pinmux node:
> > > f46fe79ff1b6 ("pinctrl-single: fix pcs_parse_pinconf() return value")
> > >
> >
> > In the kernel version 4.1.6 that I am using on my custom board, I have fixed
> > the commit f07512e615dd ("pinctrl/pinconfig: add debug interface"). However,
> > this feature was later removed (https://lore.kernel.org/patchwork/patch/1033755/).
> > Do you think it is better to bring that functionality back to life or the submitted
> > patch could be fine too?
>
> Wow, I had no idea there used to be a pinconf-config debugfs file.  I
> would have been interested in using it if it had still existed.

In Git you may always resurrect the removed feature.

> Regarding your patch, I think it could be helpful to be able to set
> the conf_<module>_<pin> registers directly through debugfs as I can
> imagine situations where it would be useful for testing.  It is a bit
> dangerous as the person using it has to be careful not to change the
> wrong bits, but they would need to have debugfs mounted and
> permissions to write to it.   I suppose it depends on what others
> maintainers like Linus and Tony think about whether that is an
> acceptable solution.


-- 
With Best Regards,
Andy Shevchenko