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[23.128.96.18]) by mx.google.com with ESMTP id m12si317193ild.137.2021.05.19.11.22.08; Wed, 19 May 2021 11:22:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350392AbhERQJx (ORCPT + 99 others); Tue, 18 May 2021 12:09:53 -0400 Received: from mga11.intel.com ([192.55.52.93]:47517 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344604AbhERQJt (ORCPT ); Tue, 18 May 2021 12:09:49 -0400 IronPort-SDR: MRlOXmV23wvCWpW17MprkNCAbfQ5ebNmzx7BZ7HWxK6OZJn1LOvlOeoPJFf8CfD/mncO5sve9r wguvFfFG4FBw== X-IronPort-AV: E=McAfee;i="6200,9189,9988"; a="197661624" X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="197661624" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 09:04:54 -0700 IronPort-SDR: h0HhQEWj/qM3fd2yAsfTLzd1KNzd8MdZtMFBQvo/F+ukrdMgYKBU4OdvrV4fCBnOR4bzRjJdq8 TNlAbsKJwGpQ== X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="542025690" Received: from craigsmi-mobl.amr.corp.intel.com (HELO [10.212.132.228]) ([10.212.132.228]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 09:04:52 -0700 Subject: Re: [RFC v2-fix 1/1] x86/tdx: Handle in-kernel MMIO To: Andi Kleen , Kuppuswamy Sathyanarayanan , Peter Zijlstra , Andy Lutomirski Cc: Tony Luck , Kirill Shutemov , Kuppuswamy Sathyanarayanan , Dan Williams , Raj Ashok , Sean Christopherson , linux-kernel@vger.kernel.org References: <3e9a26c3-8eee-88f5-f8e2-8a2dd2c028ea@intel.com> <20210518004807.258503-1-sathyanarayanan.kuppuswamy@linux.intel.com> <36cd2665-6d8b-9c0b-eec1-25152dcca2a3@intel.com> <43e583a3-ee2b-52d8-5275-e26a6609c126@linux.intel.com> From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <43e583a3-ee2b-52d8-5275-e26a6609c126@linux.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/18/21 8:56 AM, Andi Kleen wrote: > On 5/18/2021 8:00 AM, Dave Hansen wrote: >> On 5/17/21 5:48 PM, Kuppuswamy Sathyanarayanan wrote: >>> From: "Kirill A. Shutemov" >>> >>> In traditional VMs, MMIO tends to be implemented by giving a >>> guest access to a mapping which will cause a VMEXIT on access. >>> That's not possible in TDX guest. >> Why is it not possible? > > For once the TDX module doesn't support uncached mappings (IgnorePAT is > always 1) Actually, I was thinking more along the lines of why the architecture doesn't have VMEXITs: VMEXITs expose guest state to the host and VMMs use that state to emulate MMIO. TDX guests don't trust the host and can't have that arbitrary state exposed to the host. So, they sanitize the state in the #VE handler and make a *controlled* transition into the host with a TDCALL rather than an uncontrolled VMEXIT. >>> For now we only handle a subset of instructions that the kernel >>> uses for MMIO operations. User-space access triggers SIGBUS. >> How do you know which instructions the kernel uses? > > They're all in MMIO macros. I've heard exactly the opposite from the TDX team in the past. What I remember was a claim that one can not just leverage the MMIO macros as a single point to avoid MMIO. I remember being told that not all code in the kernel that does MMIO uses these macros. APIC MMIO's were called out as a place that does not use the MMIO macros. I'm confused now. >>   How do you know that the compiler won't change them? > > The macros try hard to prevent that because it would likely break real > MMIO too. > > Besides it works for others, like AMD-SEV today and of course all the > hypervisors that do the same. That would be some excellent information for the changelog.