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Date:   Wed, 19 May 2021 21:09:02 +0100
From:   Mark Brown <broonie@kernel.org>
To:     Dmitry Osipenko <digetx@gmail.com>
Cc:     Rob Herring <robh@kernel.org>,
        Thierry Reding <thierry.reding@gmail.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Takashi Iwai <tiwai@suse.com>,
        Jaroslav Kysela <perex@perex.cz>,
        Ion Agorria <ion@agorria.com>,
        Svyatoslav Ryhel <clamor95@gmail.com>,
        Frank Rowand <frowand.list@gmail.com>,
        Liam Girdwood <lgirdwood@gmail.com>,
        linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
        alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 2/2] ASoC: tegra: Unify ASoC machine drivers
Message-ID: <20210519200902.GJ4224@sirena.org.uk>
References: <20210518001356.19227-1-digetx@gmail.com>
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On Tue, May 18, 2021 at 11:16:48PM +0300, Dmitry Osipenko wrote:
> 18.05.2021 21:34, Mark Brown =D0=BF=D0=B8=D1=88=D0=B5=D1=82:

> > It's generally the clocking configuration, things with fancy clock trees
> > don't play so nicely with generic systems where we want to configure
> > them at runtime, or things with complex routing in the CPU where we
> > only recently started getting bindings that were functional enough to
> > use.  Tegra is fairly complex internally.

> This is true, but still it's more optimal to use flags in a single
> common driver for the minor differences rather than to duplicate 90% of
> the code. In practice majority of tegra boards are derived from the same
> reference design, thus the h/w configurations are mostly the same.

If you can do it yes, though some of the CODECs can have sufficiently
interesting clocking to make it useful to do something different - not
sure if any of those are upstream though, WM8903 ought to with the right
board I think.

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