Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp2117271pxj; Thu, 20 May 2021 00:03:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwg+jduKQbTjhk5KNaX/UfwSfJE0+9rCZTBs8SNDQ4G3a9+WchkmMl5KJjus8EhfMCzXGRT X-Received: by 2002:a17:906:b091:: with SMTP id x17mr2025096ejy.128.1621494209084; Thu, 20 May 2021 00:03:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621494209; cv=none; d=google.com; s=arc-20160816; b=CEDPvhYYX8L5K8zQkHgBi0CtnAygQJ5ve3xjSauueGgaXGQN9VGILyhk7UyTBp0lYj eVV9kLe6ohVSpxqtmXDu4UcpjD2Dq2XzqX9iuWAn4oUvVP7WegMQRmR9Rh3nHCmUh+CD 7U8IYLuAaVoaBjF6DSvsz/AVEiwHcwJQj0FuKlm8uWvzHEmnbmJuXz7Grwbs9PXLlxkA P3EITMU8drkc7upfAo+YQN1luyrOSuQ2Cx8EJBJiAdMSGpivU2IinzayEwon6byruGWy /TUDwTEtF/1Lt+J9fAmK128T9EwHkhGzu1oBg0NeBMS1xY2Zf97OE4lvxa9OeHU7GXRV icHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from:ironport-sdr :ironport-sdr; bh=6cwcgt7Ks4OQPDQfzScJI7pGDeebgxo8XP8d5UD7IUI=; b=1JFkuVdnWPJRNAQGzzvPLFe45sNPpxVdFpqpLTVTZ5hDg7Fc8N5L3SjrFsetBHsTpQ epjaMhI+zPlNN2XYD1kqtoBP+PMyL82scmyBJl7FM1TV5mZ0nuGMRZOi5LqGeQbG/8Db o9Pcq/hW+B78+/lGHpHYcyxMxYkktGNtF53IjW5ZVNTeXdnUbXrOUvbrqgooPRCzhr6z loRk/JJvpPlL0ls1Z2p9pRV6CyyHK4dJAl12mWo6Z4MBdRy87rJSjPzz6v532YnxiqZN n4A1g9UZs41VBpx6fsJSGOfjF8TJZMTMxeOAe1QnE0ep63GPw1OjsvBIbCTycvzttMVR 3POA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id mp20si1964462ejc.31.2021.05.20.00.03.02; Thu, 20 May 2021 00:03:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229953AbhETHDZ (ORCPT + 99 others); Thu, 20 May 2021 03:03:25 -0400 Received: from mga05.intel.com ([192.55.52.43]:53040 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229534AbhETHDZ (ORCPT ); Thu, 20 May 2021 03:03:25 -0400 IronPort-SDR: yBkLQXHCwlJ5+LqwejsdVLn+WnjmJQl3ZQq7oa/GhMZfrKaVh4gYTsA8oXOlWT9uy0SL6P6Qss 30LuDsz+aEOA== X-IronPort-AV: E=McAfee;i="6200,9189,9989"; a="286691034" X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="286691034" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2021 00:02:04 -0700 IronPort-SDR: DzMksfDfSeni6nZW1ZhQS8DNlDGGMDgqFa60CV8++BQqCy+UXKvzjCl19MBCTCpu8DkDE514xO Po0IcuhVYhng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="543206754" Received: from kbl-ppc.sh.intel.com ([10.239.159.163]) by fmsmga001.fm.intel.com with ESMTP; 20 May 2021 00:02:02 -0700 From: Jin Yao To: acme@kernel.org, jolsa@kernel.org, peterz@infradead.org, mingo@redhat.com, alexander.shishkin@linux.intel.com Cc: Linux-kernel@vger.kernel.org, ak@linux.intel.com, kan.liang@intel.com, yao.jin@intel.com, Jin Yao Subject: [PATCH v1 0/5] perf: Support perf-mem/perf-c2c for AlderLake Date: Thu, 20 May 2021 15:00:35 +0800 Message-Id: <20210520070040.710-1-yao.jin@linux.intel.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AlderLake uses a hybrid architecture utilizing Golden Cove cores (core CPU) and Gracemont cores (atom CPU). This patchset supports perf-mem and perf-c2c for AlderLake. Jin Yao (5): perf util: Check mem-loads auxiliary event perf tools: Support pmu name in perf_mem_events__name perf tools: Check if mem_events is supported for hybrid perf mem: Support record for hybrid platform perf c2c: Support record for hybrid platform tools/perf/arch/arm64/util/mem-events.c | 2 +- tools/perf/arch/powerpc/util/mem-events.c | 2 +- tools/perf/arch/x86/util/mem-events.c | 37 ++++--- tools/perf/builtin-c2c.c | 36 +++---- tools/perf/builtin-mem.c | 39 ++++---- tools/perf/util/mem-events.c | 112 ++++++++++++++++++++-- tools/perf/util/mem-events.h | 4 +- 7 files changed, 172 insertions(+), 60 deletions(-) -- 2.17.1