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a="201374653" X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="201374653" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2021 13:56:16 -0700 IronPort-SDR: p32C+la9BEuT9E072KcU9D8Tw+ECTbiR6cIvz+sFuJtOHjyDBDkd3lAmSk64s7+QGfJOOZWPPr lNTgxcdqlJVw== X-IronPort-AV: E=Sophos;i="5.82,313,1613462400"; d="scan'208";a="543763686" Received: from blydon-mobl.amr.corp.intel.com (HELO [10.209.0.109]) ([10.209.0.109]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2021 13:56:16 -0700 Subject: Re: [RFC v2 27/32] x86/tdx: Exclude Shared bit from __PHYSICAL_MASK To: Sean Christopherson , "Kuppuswamy, Sathyanarayanan" Cc: Peter Zijlstra , Andy Lutomirski , Dan Williams , Tony Luck , Andi Kleen , Kirill Shutemov , Kuppuswamy Sathyanarayanan , Raj Ashok , linux-kernel@vger.kernel.org References: <87b31425b79df3cc44d2bdc6a79d6aa36c42d116.1619458733.git.sathyanarayanan.kuppuswamy@linux.intel.com> <3ae38a0b-0676-1543-7015-39a589b2807a@intel.com> <0df80c0f-e0da-e86e-0ab8-abc58f0da559@linux.intel.com> From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/20/21 1:16 PM, Sean Christopherson wrote: > On Thu, May 20, 2021, Kuppuswamy, Sathyanarayanan wrote: >> So what is your proposal? "tdx_guest_" / "tdx_host_" ? > 1. Abstract things where appropriate, e.g. I'm guessing there is a clever way > to deal with the shared vs. private inversion and avoid tdg_shared_mask > altogether. One example here would be to keep a structure like: struct protected_mem_config { unsigned long p_set_bits; unsigned long p_clear_bits; } Where 'p_set_bits' are the bits that need to be set to establish memory protection and 'p_clear_bits' are the bits that need to be cleared. physical_mask would clear both of them: physical_mask &= ~(pmc.p_set_bits & pmc.p_set_bits); Then, in a place like __set_memory_enc_dec(), you would query whether memory protection was in place or not: + if (protect) { + cpa.mask_set = pmc.p_set_bits; + cpa.mask_clr = pmc.p_clear_bits; + map_type = TDX_MAP_PRIVATE; + } else { + cpa.mask_set = pmc.p_clear_bits; + cpa.mask_clr = pmc.p_set_bits; + map_type = TDX_MAP_SHARED; + } The is_tdx_guest() if()'s would just go away. Basically, if there's a is_tdx_guest() check in common code, it's a place that might need an abstraction. This, for instance: > + if (!ret && is_tdx_guest()) { > + ret = tdg_map_gpa(__pa(addr), numpages, map_type); > + } could probably just be: if (!ret && is_protected_guest()) { ret = x86_vmm_protect(__pa(addr), numpages, protected); }