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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Len Brown <lenb@kernel.org>
Cc:     Borislav Petkov <bp@alien8.de>, Willy Tarreau <w@1wt.eu>,
        Andy Lutomirski <luto@kernel.org>,
        Florian Weimer <fweimer@redhat.com>,
        "Bae\, Chang Seok" <chang.seok.bae@intel.com>,
        Dave Hansen <dave.hansen@intel.com>, X86 ML <x86@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Linux API <linux-api@vger.kernel.org>,
        "libc-alpha\@sourceware.org" <libc-alpha@sourceware.org>,
        Rich Felker <dalias@libc.org>, Kyle Huey <me@kylehuey.com>,
        Keno Fischer <keno@juliacomputing.com>,
        Arjan van de Ven <arjan@linux.intel.com>
Subject: Re: Candidate Linux ABI for Intel AMX and hypothetical new related features
In-Reply-To: <CAJvTdK=DCdwc86VdCVsCH+et6aGuAE3hi-wKmE5769SA0g1H-Q@mail.gmail.com>
References: <20210415044258.GA6318@zn.tnic> <20210415052938.GA2325@1wt.eu> <20210415054713.GB6318@zn.tnic> <CAJvTdKnjzAMh3N_c7KP3kA=e0LgYHgCANg44oJp3LcSm7dtbSQ@mail.gmail.com> <20210419141454.GE9093@zn.tnic> <CAJvTdK=p8mgO3xw9sRxu0c7NTNTG109M442b3UZh8TqLLfkC1Q@mail.gmail.com> <20210419191539.GH9093@zn.tnic> <CAJvTdK=VnG94ECcRVoUi8HrCbVEKc8X4_JmRTkqe+vTttf0Wsg@mail.gmail.com> <20210419215809.GJ9093@zn.tnic> <CAJvTdKn6JHo02karEs0e5g+6SimS5VUcXKjCkX35WY+xkgAgxw@mail.gmail.com> <YIMmwhEr46VPAZa4@zn.tnic> <CAJvTdKnhXnynybS4eNEF_EtF26auyb-mhKLNd1D9_zvCrchZsw@mail.gmail.com> <874kf11yoz.ffs@nanos.tec.linutronix.de> <CAJvTdKkYp+zP_9tna6YsrOz2_nmEUDLJaL_i-SNog0m2T9wZ=Q@mail.gmail.com> <87k0ntazyn.ffs@nanos.tec.linutronix.de> <CAJvTdK=DCdwc86VdCVsCH+et6aGuAE3hi-wKmE5769SA0g1H-Q@mail.gmail.com>
Date:   Thu, 20 May 2021 23:41:10 +0200
Message-ID: <87h7ixaxs9.ffs@nanos.tec.linutronix.de>
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Len,

On Thu, May 20 2021 at 17:22, Len Brown wrote:
> On Thu, May 20, 2021 at 4:54 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>> > AMX is analogous to the multiplier used by AVX-512.
>> > The architectural state must exist on every CPU, including HT siblings.
>> > Today, the HT siblings share the same execution unit,
>> > and I have no reason to expect that will change.
>>
>> I'm well aware that HT siblings share the same execution unit for
>> AVX.
>>
>> Though AMX is if I remember the discussions two years ago correctly
>> shared by more than the HT siblings which makes things worse.
>
> I regret that we were unable to get together in the last year to have
> an updated discussion.  I think if we had, then we would have saved
> a lot of mis-understanding and a lot of email!
>
> So let me emphasize here:
>
> There is one TMUL execution unit per core.
> It is shared by the HT siblings within that core.
>
> So the comparison to the AVX-512 multiplier is a good one.

Fine, but that does not at all change the facts that:

  1) It's shared between logical CPUs

  2) It has effects on power/thermal and therefore effects which reach
     outside of the core scope

  3) Your appproach of making it unconditionlly available via the
     proposed #NM prevents the OS and subsequently the system admin /
     system designer to implement fine grained control over that
     resource.

     And no, an opt-in approach by providing a non-mandatory
     preallocation prctl does not solve that problem.

Thanks,

        tglx