Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp915810pxj; Fri, 21 May 2021 02:04:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJysv3PQdw8lpkI4w0zVM6IQtuzfabLsfhNXdwthjuBJnH8Kl8idTP6uekGgwb/qkxRgeZ+E X-Received: by 2002:a05:6402:4c5:: with SMTP id n5mr9798434edw.322.1621587840889; Fri, 21 May 2021 02:04:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621587840; cv=none; d=google.com; s=arc-20160816; b=FHA0v2wp+zWivJuLl1RpznwbieNRLzT3WtOyonOEow/6LJ7kwZ1n/8DAov5n3uzblV vNo5e00bsAiiFxEyOj48djelzC257RkYvx0XabZNPcIjnJi1Pi5STK0uD4YU+tTZcKGx 5xPEM+W7OBkokZvOVSvGnSt5lEgdadO+k6hKeulAgAzjFNrFo2mOcqQB/fq7tX2k+V9b uvshFcYnsy0cCrzcgp0Zo+d3PW0a1wuHGqCm3R9FYfKCw1j3Bu4Z8crwERF3O3iHEELC DhH4OjvMJv/2cDxCkT0mlz53u597VWFTAGHuaBkTXjorwcWTMqDUnpEVUVcOo+GVdUyq WM8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=tEFeFLlXrN7s5hMropugd1IByFgGDO3tL02grQ2M6rU=; b=GBtR8ErZ8v6SUPUWo2avHrpu69PpRKCy8ZsDwXHYN64chf6gyMFAFgRj4F+GaKFjnF rXgj/OXYwHdhi8o7KyZGZv4GVMEGbRItGz9N9l/fxLjKWgUh7vXFOYwfU+qW5G+Jb+ij 02PTRTjkPiJGeadrT7ofhgWWQvnYBXahBH+d0KPMQUmC3iJMWAamQiDk4VUPZuiRlLft XRRHGKhAcdY5kxlrxqqDOn7cWpKc5jZva9eE8vSSHDSSthcvUTX6MD3RyyutugU1eq20 zuCSNQbv5IF6n5MyMnyq+fqjhAXRY2S2WtrirxX1gTlLniXkerC2GNitlvobMF1H0+VP eBHg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@jms.id.au header.s=google header.b="K5aql/Fy"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f20si4537714edq.178.2021.05.21.02.03.37; Fri, 21 May 2021 02:04:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@jms.id.au header.s=google header.b="K5aql/Fy"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236751AbhEUB1J (ORCPT + 99 others); Thu, 20 May 2021 21:27:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236106AbhEUB1I (ORCPT ); Thu, 20 May 2021 21:27:08 -0400 Received: from mail-qt1-x82d.google.com (mail-qt1-x82d.google.com [IPv6:2607:f8b0:4864:20::82d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BA7EC061574; Thu, 20 May 2021 18:25:45 -0700 (PDT) Received: by mail-qt1-x82d.google.com with SMTP id y12so14221925qtx.11; Thu, 20 May 2021 18:25:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jms.id.au; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=tEFeFLlXrN7s5hMropugd1IByFgGDO3tL02grQ2M6rU=; b=K5aql/FypUyDgtlwguPy2zRcTYxI825oNlH+pPWiPZY/grHIQTRtauU0g1zQMuhfGS xEjknimLJhEDjAwK5CqqtCV0mceHohEWviAKPoWwru8foxIQy1r3rnw39wMZb0Hjh3Wm 8kSmH2cEJv6jZtTo/7Z4h8ba9D8KB5lkRt32k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=tEFeFLlXrN7s5hMropugd1IByFgGDO3tL02grQ2M6rU=; b=tibWmNTmTJVW0vsxgJAoltFEu6t8fFp2Xqm4lT5y1oz33r6uUB1SCQGXvLcLB/NRXp 8XD+YQAe1/QhMPrQFisJ3s4R1CojWLtkZWSugwu4jt0fnio1+sL0xLuxpmQ/BWgIRB6E xNFJrjIM0sS3aypDa0VngXsqUHPh20Hx1N9spWPyqZbJtyMyV2228+oF4i9nQdXb3zKo uD0+4EdyD4bg1U4bW2WPJWYWZSUA61YB/cwLYKAnSDrwacCoJYtXwLTjcRYo7R3sE5RP +U0pKSMNC12UlvkXLsQGlDy7ic/zo+nnQrTIdVDPoXfuSjrl1R51kHlVxV9kIsXla48O +gUg== X-Gm-Message-State: AOAM532eksjktZMC3syJqav63h+JfD0DA8MJJlyVNkhfP0dvixvuiQ/c 6d1Qnv1H9oVKlvsIRYelvS456pl8C5jA9E0OBcI= X-Received: by 2002:ac8:7547:: with SMTP id b7mr8821733qtr.176.1621560344522; Thu, 20 May 2021 18:25:44 -0700 (PDT) MIME-Version: 1.0 References: <20210520101346.16772-1-steven_lee@aspeedtech.com> <20210520101346.16772-2-steven_lee@aspeedtech.com> In-Reply-To: <20210520101346.16772-2-steven_lee@aspeedtech.com> From: Joel Stanley Date: Fri, 21 May 2021 01:25:31 +0000 Message-ID: Subject: Re: [PATCH v4 1/3] ARM: dts: aspeed: ast2600evb: Add sdhci node and gpio regulator for A2 evb. To: Steven Lee , Ryan Chen Cc: Rob Herring , Andrew Jeffery , Adrian Hunter , Ulf Hansson , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list , "moderated list:ASPEED SD/MMC DRIVER" , "open list:ASPEED SD/MMC DRIVER" , Hongwei Zhang , Chin-Ting Kuo Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Steven, On Thu, 20 May 2021 at 10:16, Steven Lee wrote: > > AST2600 A2(or newer) EVB has gpio regulators for toggling signal voltage > between 3.3v and 1.8v, the patch adds sdhci node and gpio regulator in the > new dts file and adds commment for describing the reference design. spelling: comment I need you to justify the separate dts for the A2 EVB. What would happen if this device tree was loaded on to an A1 or A0? Would this device tree be used for the A3 (and any future revision?) An alternative proposal: we modify the ast2600-evb.dts to support the A2 (which I assume would also support the A3). If we need a separate board file for the A0 and A1 EVB, we add a new one that supports these earlier revisions. Or we decide to only support the latest revision in mainline. > > Signed-off-by: Steven Lee > --- > arch/arm/boot/dts/aspeed-ast2600-evb-a2.dts | 98 +++++++++++++++++++++ > 1 file changed, 98 insertions(+) > create mode 100644 arch/arm/boot/dts/aspeed-ast2600-evb-a2.dts > > diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb-a2.dts b/arch/arm/boot/dts/aspeed-ast2600-evb-a2.dts > new file mode 100644 > index 000000000000..d581e8069a82 > --- /dev/null > +++ b/arch/arm/boot/dts/aspeed-ast2600-evb-a2.dts > @@ -0,0 +1,98 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +// Copyright 2021 IBM Corp. > + > +#include "aspeed-ast2600-evb.dts" > +#include > + > +/ { > + model = "AST2600 A2 EVB"; > + compatible = "aspeed,ast2600"; Will this override the "aspeed,ast2600-evb" compatible in the dts? I think you can drop the compatible string here and just use the one from the DTS. > + > + vcc_sdhci0: regulator-vcc-sdhci0 { > + compatible = "regulator-fixed"; > + regulator-name = "SDHCI0 Vcc"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpios = <&gpio0 168 We have macros for describing the GPIOs: ASPEED_GPIO(V, 0) > + GPIO_ACTIVE_HIGH>; This can go on one line. > + enable-active-high; > + }; > + > + vccq_sdhci0: regulator-vccq-sdhci0 { > + compatible = "regulator-gpio"; > + regulator-name = "SDHCI0 VccQ"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + gpios = <&gpio0 169 > + GPIO_ACTIVE_HIGH>; > + gpios-states = <1>; > + states = <3300000 1>, > + <1800000 0>; > + }; > + > + vcc_sdhci1: regulator-vcc-sdhci1 { > + compatible = "regulator-fixed"; > + regulator-name = "SDHCI1 Vcc"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpios = <&gpio0 170 > + GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + vccq_sdhci1: regulator-vccq-sdhci1 { > + compatible = "regulator-gpio"; > + regulator-name = "SDHCI1 VccQ"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + gpios = <&gpio0 171 > + GPIO_ACTIVE_HIGH>; > + gpios-states = <1>; > + states = <3300000 1>, > + <1800000 0>; > + }; > +}; > + > +&sdc { > + status = "okay"; > +}; > + > +/* > + * The signal voltage of sdhci0 and sdhci1 on AST2600-A2 EVB is able to be > + * toggled by GPIO pins. > + * In the reference design, GPIOV0 of AST2600-A2 EVB is connected to the > + * power load switch that providing 3.3v to sdhci0 vdd, GPIOV1 is connected to > + * a 1.8v and a 3.3v power load switch that providing signal voltage to nit: provides > + * sdhci0 bus. > + * If GPIOV0 is active high, sdhci0 is enabled, otherwise, sdhci0 is disabled. > + * If GPIOV1 is active high, 3.3v power load switch is enabled, sdhci0 signal > + * voltage is 3.3v, otherwise, 1.8v power load switch will be enabled, > + * sdhci0 signal voltage becomes 1.8v. > + * AST2600-A2 EVB also support toggling signal voltage for sdhci1. nit: supports > + * The design is the same as sdhci0, it uses GPIOV2 as power-gpio and GPIOV3 > + * as power-switch-gpio. > + */ > +&sdhci0 { > + status = "okay"; > + bus-width = <4>; > + max-frequency = <100000000>; > + sdhci-drive-type = /bits/ 8 <3>; > + sdhci-caps-mask = <0x7 0x0>; > + sdhci,wp-inverted; > + vmmc-supply = <&vcc_sdhci0>; > + vqmmc-supply = <&vccq_sdhci0>; > + clk-phase-sd-hs = <7>, <200>; > +}; > + > +&sdhci1 { > + status = "okay"; > + bus-width = <4>; > + max-frequency = <100000000>; > + sdhci-drive-type = /bits/ 8 <3>; > + sdhci-caps-mask = <0x7 0x0>; > + sdhci,wp-inverted; > + vmmc-supply = <&vcc_sdhci1>; > + vqmmc-supply = <&vccq_sdhci1>; > + clk-phase-sd-hs = <7>, <200>; > +}; > + > -- > 2.17.1 >