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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Len Brown <lenb@kernel.org>
Cc:     Borislav Petkov <bp@alien8.de>, Willy Tarreau <w@1wt.eu>,
        Andy Lutomirski <luto@kernel.org>,
        Florian Weimer <fweimer@redhat.com>,
        "Bae\, Chang Seok" <chang.seok.bae@intel.com>,
        Dave Hansen <dave.hansen@intel.com>, X86 ML <x86@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Linux API <linux-api@vger.kernel.org>,
        "libc-alpha\@sourceware.org" <libc-alpha@sourceware.org>,
        Rich Felker <dalias@libc.org>, Kyle Huey <me@kylehuey.com>,
        Keno Fischer <keno@juliacomputing.com>,
        Arjan van de Ven <arjan@linux.intel.com>
Subject: Re: Candidate Linux ABI for Intel AMX and hypothetical new related features
In-Reply-To: <CAJvTdKmC3dY3BZafPvh1M880kGAusViCAZNBQ3NoLvOQgWuuBA@mail.gmail.com>
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Date:   Fri, 21 May 2021 11:26:26 +0200
Message-ID: <87eee0bfp9.ffs@nanos.tec.linutronix.de>
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Len,

On Thu, May 20 2021 at 17:49, Len Brown wrote:
> On Thu, May 20, 2021 at 5:41 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>>   2) It has effects on power/thermal and therefore effects which reach
>>      outside of the core scope
>
> FWIW, this is true of *every* instruction in the CPU.
> Indeed, even when the CPU is executing *no* instructions at all,
> the C-state chosen by that CPU has power/thermal impacts on its peers.
>
> Granted, high performance instructions such as AVX-512 and TMUL
> are the most extreme case.

Right and we have to draw the line somewhere.

>>   3) Your approach of making it unconditionally available via the
>>      proposed #NM prevents the OS and subsequently the system admin /
>>      system designer to implement fine grained control over that
>>      resource.
>>
>>      And no, an opt-in approach by providing a non-mandatory
>>      preallocation prctl does not solve that problem.
>
> I'm perfectly fine with making the explicit allocation (aka opt-in) mandatory,
> and enforcing it.

Great!

Thanks,

        tglx