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In-Reply-To: <87h7ixaxs9.ffs@nanos.tec.linutronix.de>
From:   Len Brown <lenb@kernel.org>
Date:   Thu, 20 May 2021 17:49:33 -0400
Message-ID: <CAJvTdKmC3dY3BZafPvh1M880kGAusViCAZNBQ3NoLvOQgWuuBA@mail.gmail.com>
Subject: Re: Candidate Linux ABI for Intel AMX and hypothetical new related features
To:     Thomas Gleixner <tglx@linutronix.de>
Cc:     Borislav Petkov <bp@alien8.de>, Willy Tarreau <w@1wt.eu>,
        Andy Lutomirski <luto@kernel.org>,
        Florian Weimer <fweimer@redhat.com>,
        "Bae, Chang Seok" <chang.seok.bae@intel.com>,
        Dave Hansen <dave.hansen@intel.com>, X86 ML <x86@kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Linux API <linux-api@vger.kernel.org>,
        "libc-alpha@sourceware.org" <libc-alpha@sourceware.org>,
        Rich Felker <dalias@libc.org>, Kyle Huey <me@kylehuey.com>,
        Keno Fischer <keno@juliacomputing.com>,
        Arjan van de Ven <arjan@linux.intel.com>
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On Thu, May 20, 2021 at 5:41 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>
> Len,
>
> On Thu, May 20 2021 at 17:22, Len Brown wrote:
> > On Thu, May 20, 2021 at 4:54 PM Thomas Gleixner <tglx@linutronix.de> wrote:
> >> > AMX is analogous to the multiplier used by AVX-512.
> >> > The architectural state must exist on every CPU, including HT siblings.
> >> > Today, the HT siblings share the same execution unit,
> >> > and I have no reason to expect that will change.
> >>
> >> I'm well aware that HT siblings share the same execution unit for
> >> AVX.
> >>
> >> Though AMX is if I remember the discussions two years ago correctly
> >> shared by more than the HT siblings which makes things worse.
> >
> > I regret that we were unable to get together in the last year to have
> > an updated discussion.  I think if we had, then we would have saved
> > a lot of mis-understanding and a lot of email!
> >
> > So let me emphasize here:
> >
> > There is one TMUL execution unit per core.
> > It is shared by the HT siblings within that core.
> >
> > So the comparison to the AVX-512 multiplier is a good one.
>
> Fine, but that does not at all change the facts that:
>
>   1) It's shared between logical CPUs
>
>   2) It has effects on power/thermal and therefore effects which reach
>      outside of the core scope

FWIW, this is true of *every* instruction in the CPU.
Indeed, even when the CPU is executing *no* instructions at all,
the C-state chosen by that CPU has power/thermal impacts on its peers.

Granted, high performance instructions such as AVX-512 and TMUL
are the most extreme case.

>   3) Your approach of making it unconditionally available via the
>      proposed #NM prevents the OS and subsequently the system admin /
>      system designer to implement fine grained control over that
>      resource.
>
>      And no, an opt-in approach by providing a non-mandatory
>      preallocation prctl does not solve that problem.

I'm perfectly fine with making the explicit allocation (aka opt-in) mandatory,
and enforcing it.

Len Brown, Intel Open Source Technology Center