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From:   Yanan Wang <wangyanan55@huawei.com>
To:     Rob Herring <robh+dt@kernel.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>
CC:     <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-riscv@lists.infradead.org>, <wanghaibin.wang@huawei.com>,
        Yanan Wang <wangyanan55@huawei.com>
Subject: [PATCH] Documentation: dt-bindings: Fix incorrect statement
Date:   Fri, 21 May 2021 17:57:20 +0800
Message-ID: <20210521095720.5592-1-wangyanan55@huawei.com>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

It's found when reading the Doc.

In a SMP system, the hierarchy of CPUs now can be defined through
four not three entities (socket/cluster/core/thread), so correct
the statement to avoid possible confusion.

Since we are already there, also drop an extra space and tweak
the title alignment. No real context change at all.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
---
 Documentation/devicetree/bindings/cpu/cpu-topology.txt | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpu/cpu-topology.txt b/Documentation/devicetree/bindings/cpu/cpu-topology.txt
index 9bd530a35d14..8b23a98c283c 100644
--- a/Documentation/devicetree/bindings/cpu/cpu-topology.txt
+++ b/Documentation/devicetree/bindings/cpu/cpu-topology.txt
@@ -6,7 +6,7 @@ CPU topology binding description
 1 - Introduction
 ===========================================
 
-In a SMP system, the hierarchy of CPUs is defined through three entities that
+In a SMP system, the hierarchy of CPUs is defined through four entities that
 are used to describe the layout of physical CPUs in the system:
 
 - socket
@@ -75,7 +75,7 @@ whose bindings are described in paragraph 3.
 
 The nodes describing the CPU topology (socket/cluster/core/thread) can
 only be defined within the cpu-map node and every core/thread in the
-system must be defined within the topology.  Any other configuration is
+system must be defined within the topology. Any other configuration is
 invalid and therefore must be ignored.
 
 ===========================================
@@ -91,9 +91,9 @@ cpu-map child nodes which do not share a common parent node can have the same
 name (ie same number N as other cpu-map child nodes at different device tree
 levels) since name uniqueness will be guaranteed by the device tree hierarchy.
 
-===========================================
+============================================
 3 - socket/cluster/core/thread node bindings
-===========================================
+============================================
 
 Bindings for socket/cluster/cpu/thread nodes are defined as follows:
 
-- 
2.19.1