Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1400965pxj; Fri, 21 May 2021 13:20:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx6odLIYdkpR4XkjKwmwLVQgQUe31Ofjzi2MRKax4rua0Jy5SESSLrYIh6mIbOHjSCpeYqB X-Received: by 2002:a05:6638:2594:: with SMTP id s20mr6907740jat.140.1621628434148; Fri, 21 May 2021 13:20:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621628434; cv=none; d=google.com; s=arc-20160816; b=LwHl4M9b8j1Pm2eg2dooaRfQ5bs1v2PUX0WSUVPkOTMNIntEOib2ePlFd3BqAQ7Zwq AhgC4R4ETOVGGyVrreLVi/ScGh1uSix2knbZfgxfR3CpMEF0dtWQniMtkwz3j1+OB7Tn 5hjzoV84r+pdyl4RCj2gIxZbUagPoUJcmSakUIOsHkcVnbNJZNP3e/f4gvNHoNZBjkZ/ A+1fqxI2rR6oO0uoXkxcjv9tu/KjjVpFe4s43+3YP5NeFfbkbKcIt2Lb1dsVvV2C1ave gtoqtbefeWX9phDTJ1qXzUoPbR2jIIEVB/CBQNBqnqW7g0kU+L9UCTJ3A/LiKXSFtDpI cusQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=HoTlCQeIefWal0jX4Wy2FmD5HzRScQBvDxI0cAoOM5s=; b=bO0t8zi2FBI/3qcV7zVq/5TVydMaCXaHhYcVyqd6JI6Br6cIgwFWbbs5Oj+Tl6+P38 VUPPpSdGwjd6XR9cSrmGVChI+5s6+4otiASSJUyKC7Q+JgfFCJ/qGx7NwvAnIB1b9oHl r9Qqn020g4k3BMW2Ob5Vnc3dUQwaolDJwgFMLYyBQnMmAUOeuiyHyMVY+A+uIaOx+i7x Pnq8m9pOYi26s+NCuSY2zesdXtHX2VmMvA8JPik1GptIg63DfqdjGPPI2QYYbrwCokZw JtkBTpiEO6sXKwJ0Ghn2vtvIHjdmp/2f1rqsQvln9Hnsp379FZNGPHbIWJgfAbpKo4K1 MpiQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p5si7482209ilm.11.2021.05.21.13.20.21; Fri, 21 May 2021 13:20:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236685AbhEUPYX (ORCPT + 99 others); Fri, 21 May 2021 11:24:23 -0400 Received: from foss.arm.com ([217.140.110.172]:49722 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232199AbhEUPYX (ORCPT ); Fri, 21 May 2021 11:24:23 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CEEB211B3; Fri, 21 May 2021 08:22:59 -0700 (PDT) Received: from e107158-lin.cambridge.arm.com (unknown [10.1.195.57]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7F8DD3F73B; Fri, 21 May 2021 08:22:57 -0700 (PDT) Date: Fri, 21 May 2021 16:22:55 +0100 From: Qais Yousef To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Catalin Marinas , Marc Zyngier , Greg Kroah-Hartman , Peter Zijlstra , Morten Rasmussen , Suren Baghdasaryan , Quentin Perret , Tejun Heo , Li Zefan , Johannes Weiner , Ingo Molnar , Juri Lelli , Vincent Guittot , "Rafael J. Wysocki" , kernel-team@android.com Subject: Re: [PATCH v6 02/21] arm64: Allow mismatched 32-bit EL0 support Message-ID: <20210521152255.tosr4jwok6cjg6sf@e107158-lin.cambridge.arm.com> References: <20210518094725.7701-1-will@kernel.org> <20210518094725.7701-3-will@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20210518094725.7701-3-will@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/18/21 10:47, Will Deacon wrote: > When confronted with a mixture of CPUs, some of which support 32-bit > applications and others which don't, we quite sensibly treat the system > as 64-bit only for userspace and prevent execve() of 32-bit binaries. > > Unfortunately, some crazy folks have decided to build systems like this > with the intention of running 32-bit applications, so relax our > sanitisation logic to continue to advertise 32-bit support to userspace > on these systems and track the real 32-bit capable cores in a cpumask > instead. For now, the default behaviour remains but will be tied to > a command-line option in a later patch. > > Signed-off-by: Will Deacon > --- > arch/arm64/include/asm/cpucaps.h | 3 +- Heads up. I just tried to apply this on 5.13-rc2 and it failed because cpucaps. was removed; it's autogenerated now. See commit 0c6c2d3615ef: ()"arm64: Generate cpucaps.h") Cheers -- Qais Youesf