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Date:   Fri, 21 May 2021 09:31:26 -0700
From:   "Andy Lutomirski" <luto@kernel.org>
To:     "Florian Weimer" <fweimer@redhat.com>,
        "Dave Hansen" <dave.hansen@intel.com>
Cc:     "Dave Hansen via Libc-alpha" <libc-alpha@sourceware.org>,
        "Len Brown" <lenb@kernel.org>, "Rich Felker" <dalias@libc.org>,
        "Linux API" <linux-api@vger.kernel.org>,
        "Bae, Chang Seok" <chang.seok.bae@intel.com>,
        "the arch/x86 maintainers" <x86@kernel.org>,
        "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
        "Kyle Huey" <me@kylehuey.com>, "Borislav Petkov" <bp@alien8.de>,
        "Thomas Gleixner" <tglx@linutronix.de>,
        "Keno Fischer" <keno@juliacomputing.com>,
        "Arjan van de Ven" <arjan@linux.intel.com>,
        "Willy Tarreau" <w@1wt.eu>
Subject: =?UTF-8?Q?Re:_Candidate_Linux_ABI_for_Intel_AMX_and_hypothetical_new_rel?=
 =?UTF-8?Q?ated_features?=
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On Fri, May 21, 2021, at 9:19 AM, Florian Weimer wrote:
> * Dave Hansen:
>=20
> > On 5/21/21 7:44 AM, Florian Weimer wrote:
> >> * Dave Hansen via Libc-alpha:
> >>> Our system calls are *REALLY* fast.  We can even do a vsyscall for=
 this
> >>> if we want to get the overhead down near zero.  Userspace can also=
 cache
> >>> the "I did the prctl()" state in thread-local storage if it wants =
to
> >>> avoid the syscall.
> >> Why can't userspace look at XCR0 to make the decision?
> >
> > The thing we're trying to avoid is a #NM exception from XFD (the new=

> > first-use detection feature) that occurs on the first use of AMX.
> > XCR0 will have XCR0[AMX]=3D1, even if XFD is "armed" and ready to
> > generate the #NM.
>=20
> I see.  So essentially the hardware wants to offer transparent
> initialize-on-use, but Linux does not seem to want to implement it thi=
s
> way.
>=20
> Is there still a chance to bring the hardware and Linux into alignment=
?

arch_prctl(SET_XSTATE_INIT_ON_FIRST_USE, TILE_STUFF);?

As long as this is allowed to fail, I don=E2=80=99t have a huge problem =
with it.

I think several things here are regrettable:

1. Legacy XSTATE code might assume that XCR0 is a constant.

2. Intel virt really doesn=E2=80=99t like us context switching XCR0, alt=
hough we might say that this is Intel=E2=80=99s fault and therefore Inte=
l=E2=80=99s problem. AMD hardware doesn=E2=80=99t appear to have this is=
sue.

3. AMX bring tangled up in XSTATE is unfortunate.  The whole XSTATE mech=
anism is less than amazing.

IMO the best we can make of this whole situation is to make XCR0 dynamic=
, but the legacy compatibility issues are potentially problematic.

>=20
> Thanks,
> Florian
>=20
>=20