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[23.128.96.18]) by mx.google.com with ESMTP id y5si7821211ily.21.2021.05.21.13.23.37; Fri, 21 May 2021 13:23:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=kALmOtFC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237961AbhEURLk (ORCPT + 99 others); Fri, 21 May 2021 13:11:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229565AbhEURLk (ORCPT ); Fri, 21 May 2021 13:11:40 -0400 Received: from mail-yb1-xb29.google.com (mail-yb1-xb29.google.com [IPv6:2607:f8b0:4864:20::b29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26996C061574; Fri, 21 May 2021 10:10:16 -0700 (PDT) Received: by mail-yb1-xb29.google.com with SMTP id y36so11810403ybi.11; Fri, 21 May 2021 10:10:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=6PyJIHGnDYh6P31ntK4ge2w93dHWPRrD4kywlBEOeWc=; b=kALmOtFCp+8NprW7sjYSuh7FbN7jOmHzc2LDU3WTB83s3Tg15h10xuq0HhjkatVjHN ysLXDhTTxfvqOXFePbKR+zQixXEbSZhmvXlJ6JIs1lx/ciOHRkCcrz2WCP+pBeTRd8g9 wYYmb1xlOf8P3fOsC9XEGH+OD5R6cEDya+2sxrtlUfi6qQvGouMs5IMsBIntZxIL6gQJ uk/+bl5osdAZNliiL71LhljwO15vgpd27tKxbk2xr7h1fK7nxGf12d2kVvgRD1uVSHnf LKUAHNNO8DSPdaZ7Owpd+g3IJBxUkNEWzarO7NXMN7d2as1G0BKVOf1E3gu69nxi2WjE +aeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=6PyJIHGnDYh6P31ntK4ge2w93dHWPRrD4kywlBEOeWc=; b=RS6HVqZZVOzl2i0lJ6J4Tkd6btAMHVELzYD7xRDmIpgIEp6Sm4ihS+FFevLU2hOl6C pPjLEYF+JtpfgrX8cXk9IzVyBY7vrb1+iRtL4ibbOqv74HY5bD9OzNPGTFMXXUTYzPY2 vEnZQYwwCGrms7rfttWqL/I/uAjBa6E3cZ5LSThQQet7PJ5/WgN/1I1/eUxiayGsLeBH vlxPYuNqUMqBiFOcXn+2WGozPamKJ+gaTaV4ab9r+Sp1QtyhQjbqNCRO1s7EBpzFsimZ 9DRx2JozOGDT6FwagwSMGh8nUl2MTM5mdVrnr2mY1wmWcVe/u9x3vwzy1dTNGjHDspLp W+wg== X-Gm-Message-State: AOAM532hd7rl0rusXlJm0q9/7XoUQnxhn+OWFXPsnRPn+Ajq8q9h0+BW VpAgA/OOiWVAayXn1IByCmrbnJMJ9gKPOjdm/tcjUncyNQmrbw== X-Received: by 2002:a5b:54a:: with SMTP id r10mr16608668ybp.476.1621617015403; Fri, 21 May 2021 10:10:15 -0700 (PDT) MIME-Version: 1.0 References: <20210514192218.13022-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20210514192218.13022-3-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: "Lad, Prabhakar" Date: Fri, 21 May 2021 18:09:49 +0100 Message-ID: Subject: Re: [PATCH 02/16] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants To: Geert Uytterhoeven Cc: Lad Prabhakar , Rob Herring , Magnus Damm , Michael Turquette , Stephen Boyd , Greg Kroah-Hartman , Catalin Marinas , Will Deacon , Jiri Slaby , Philipp Zabel , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , Linux-Renesas , linux-clk , "open list:SERIAL DRIVERS" , Linux ARM , Biju Das Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Geert, Thank you for the review. On Fri, May 21, 2021 at 2:23 PM Geert Uytterhoeven wrote: > > Hii Prabhakar, > > On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar > wrote: > > Add device tree bindings documentation for Renesas RZ/G2{L,LC} > > SoC variants. > > > > Signed-off-by: Lad Prabhakar > > Reviewed-by: Biju Das > > Reviewed-by: Chris Paterson > > > --- a/Documentation/devicetree/bindings/arm/renesas.yaml > > +++ b/Documentation/devicetree/bindings/arm/renesas.yaml > > @@ -308,6 +308,15 @@ properties: > > - renesas,r9a07g043u11 # Single Cortex-A55 RZ/G2UL > > - const: renesas,r9a07g043 > > > > + - description: RZ/G2{L,LC} (R9A07G044) > > + items: > > + - enum: > > + - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC > > + - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC > > + - renesas,r9a07g044l1 # Single Cortex-A55 RZ/G2L > > + - renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L > > Given the LSI DEVID is the same for all four, and presumably they're > thus the same die with different packaging, do we need these four > compatible values? > Yes the LSI DEVID is the same for all the above, so as to differentiate between each SoC's, these compatible strings are added. * For example some IP blocks which are present on RZ/G2L aren't present in RZ/G2LC. * Adding this to DTS gives an opportunity to stop booting if the wrong DTB is loaded into the board. Cheers, Prabhakar > > + - const: renesas,r9a07g044 > > + > > additionalProperties: true > > Gr{oetje,eeting}s, > > Geert > > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds