Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1403869pxj; Fri, 21 May 2021 13:25:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz6vu1RjZusLDxi8MQGurmHjRo2+NXO7I8oIyK3ZaG2r7c5N32KMZ4dFL5uOg+Df9M8CwJ3 X-Received: by 2002:a6b:f80e:: with SMTP id o14mr686412ioh.176.1621628723735; Fri, 21 May 2021 13:25:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621628723; cv=none; d=google.com; s=arc-20160816; b=pK66eZhFlJQI6uOvdqClYHFS8ENsm1TCItUn4ftg9CCcP3nHb7yU1IC0brPqKQ0w+/ XOaMLw8NFvy0w7ZTL2cMJKDINCiLGFsTp9wvPIm8eIADCOCroZBIYjWY+cRgX7/c2LRV WbUzuNJVEwN17+uzGeU4eVLdU8nXoQJTlgt06jK6zKPP2/avCArbTWERxM3XOC1JP5Bg 0RCiGSyK0B2OLP+lBSZHhzuT6lQ0YOgzayghMPCbtl3Ow+LI8YXguxlJkqulE0VwOON0 Xb1giM9FpPyDIPoPgNchaztdeE7K7wBPjuKJa7zOlDAWNcg6tjJHJUboL0LMv8CrwE1Q fF9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=Vdzm9I5Cwqtsdguqe73vF4Er3J88rXcoFF4x2zigLW0=; b=fo3pKD1rtFSnVDDzs1xuoeqg111AwHD+2a1jl9t9669mu+NDKY+AZXqdav3abBEEVF dLNgpZKLZ/k4uHt0X05rnPYmk2ScahEZP68SFHQ3+Al3iutuZKHQLex1iSTsqIHIpNWn Qi11NhR93Si4SOwLGO228D8B5lmDq8X+a17w830z+IaPXkpcZ3qKKGVajha4ivqjZJD4 eqZ5ovYcSj1jesucGP5n0gk3aDT41j3dPbnJSwtL9DTRmEHP62FJw6PztSDpONnpwcwB oSmhlLaeK4For8SVdfrB6/jaTbHUjJNacDlsgCs4NkoJhI4tj/AU6OSbreAfuv0wmamz Ii3A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d70si7327303iog.4.2021.05.21.13.25.11; Fri, 21 May 2021 13:25:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234816AbhEURiu (ORCPT + 99 others); Fri, 21 May 2021 13:38:50 -0400 Received: from foss.arm.com ([217.140.110.172]:52418 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232624AbhEURit (ORCPT ); Fri, 21 May 2021 13:38:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E7621424; Fri, 21 May 2021 10:37:26 -0700 (PDT) Received: from e107158-lin.cambridge.arm.com (e107158-lin.cambridge.arm.com [10.1.195.57]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B42003F73D; Fri, 21 May 2021 10:37:23 -0700 (PDT) Date: Fri, 21 May 2021 18:37:21 +0100 From: Qais Yousef To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Catalin Marinas , Marc Zyngier , Greg Kroah-Hartman , Peter Zijlstra , Morten Rasmussen , Suren Baghdasaryan , Quentin Perret , Tejun Heo , Li Zefan , Johannes Weiner , Ingo Molnar , Juri Lelli , Vincent Guittot , "Rafael J. Wysocki" , kernel-team@android.com Subject: Re: [PATCH v6 21/21] Documentation: arm64: describe asymmetric 32-bit support Message-ID: <20210521173721.untjfglvxja6v6ot@e107158-lin.cambridge.arm.com> References: <20210518094725.7701-1-will@kernel.org> <20210518094725.7701-22-will@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20210518094725.7701-22-will@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/18/21 10:47, Will Deacon wrote: > Document support for running 32-bit tasks on asymmetric 32-bit systems > and its impact on the user ABI when enabled. > > Signed-off-by: Will Deacon > --- > .../admin-guide/kernel-parameters.txt | 3 + > Documentation/arm64/asymmetric-32bit.rst | 149 ++++++++++++++++++ > Documentation/arm64/index.rst | 1 + > 3 files changed, 153 insertions(+) > create mode 100644 Documentation/arm64/asymmetric-32bit.rst > [...] > +Cpusets > +------- > + > +The affinity of a 32-bit task may include CPUs that are not explicitly > +allowed by the cpuset to which it is attached. This can occur as a > +result of the following two situations: > + > + - A 64-bit task attached to a cpuset which allows only 64-bit CPUs > + executes a 32-bit program. > + > + - All of the 32-bit-capable CPUs allowed by a cpuset containing a > + 32-bit task are offlined. > + > +In both of these cases, the new affinity is calculated according to step > +(2) of the process described in `execve(2)`_ and the cpuset hierarchy is > +unchanged irrespective of the cgroup version. nit: Should we call out that we're breaking cpuset-v1 behavior? Don't feel strongly about it. Cheers -- Qais Yousef