Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp3436342pxj; Mon, 24 May 2021 06:47:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyRvRsogk3uEfPDllJzzNcNWFqvLpB86gtjvAIjyK0C6U15fNL9wx6tO92fuqc37Xvm48o9 X-Received: by 2002:a05:6638:76d:: with SMTP id y13mr24529973jad.25.1621864035829; Mon, 24 May 2021 06:47:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621864035; cv=none; d=google.com; s=arc-20160816; b=OXFg2Grz+rxEhJ701EP9oTBc3JOPgVACeE7HUpyTo99j6pPFmNf9txTZlTmYq1bY5a MNHTHYtYJ+KOIrL1jZIYytHhQzu9Ra/flJJimqCNm9uoKm4m0FU5PGtnp0nHKo9p+/zU xxC+bI5+A920gXmRNb2uUUWfGd5d5WEl9Byi+2dFohlno7GJ3/E+LTp/+YluYShKhFLj 5vpIyIAsZFeMRNikziqP+dairulMzOOB7S/4SNP0rBTln3tcucZ8JoBr7ryU/LOsM0iR 9Z+fKcmlfBBWfUet+zmau5tKHpaFHpcIOX0fzQsZAgwLBGcnqXwXjoyynI5SQKrYjGqx oVJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=wLkUSDyklOgzjX6nOsOUMj3tIjn8CN+JO345WitDOdE=; b=YjkEtR8Cl4eaFY88FEwtWYhR/vDxdzxvspwEGu2z2+dZsa9BLFTT5uKWPUGSIbdQq1 XrD4wiYYn3rjWuH+IsFm/nI0v9jue3fMSaiXrNXLeLL6RP3HVXLvjq5En7kob8loRir3 MvPyVp3TyAakQqLCOPWuvLE7woXokxDKcAt0k0ngvQKE9ndy7HUSfzPnkMrLz4+K8688 bunCHBgGEJeXZHiXFaroGrB2wO6vnJ6kQNy1f43WU2WmtXUVgCPY8HPi6c7FdVZcpSDs UmYl1GDG9z7c8TGKqDghbW2nHcFBzAFCknZXEvzdQht/R73e8Eo4AOPw3+zbydUCPp4d B/Gg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g10si14619516iow.86.2021.05.24.06.47.03; Mon, 24 May 2021 06:47:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232844AbhEXNrg (ORCPT + 99 others); Mon, 24 May 2021 09:47:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:41158 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232409AbhEXNrf (ORCPT ); Mon, 24 May 2021 09:47:35 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id CBE1861090; Mon, 24 May 2021 13:46:04 +0000 (UTC) Date: Mon, 24 May 2021 14:46:02 +0100 From: Catalin Marinas To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, Marc Zyngier , Greg Kroah-Hartman , Peter Zijlstra , Morten Rasmussen , Qais Yousef , Suren Baghdasaryan , Quentin Perret , Tejun Heo , Li Zefan , Johannes Weiner , Ingo Molnar , Juri Lelli , Vincent Guittot , "Rafael J. Wysocki" , kernel-team@android.com Subject: Re: [PATCH v6 02/21] arm64: Allow mismatched 32-bit EL0 support Message-ID: <20210524134602.GA14645@arm.com> References: <20210518094725.7701-1-will@kernel.org> <20210518094725.7701-3-will@kernel.org> <20210521104155.GC6675@arm.com> <20210524120959.GB14913@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210524120959.GB14913@willie-the-truck> User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 24, 2021 at 01:09:59PM +0100, Will Deacon wrote: > On Fri, May 21, 2021 at 11:41:56AM +0100, Catalin Marinas wrote: > > On Tue, May 18, 2021 at 10:47:06AM +0100, Will Deacon wrote: > > > +static int enable_mismatched_32bit_el0(unsigned int cpu) > > > +{ > > > + struct cpuinfo_arm64 *info = &per_cpu(cpu_data, cpu); > > > + bool cpu_32bit = id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0); > > > + > > > + if (cpu_32bit) { > > > + cpumask_set_cpu(cpu, cpu_32bit_el0_mask); > > > + static_branch_enable_cpuslocked(&arm64_mismatched_32bit_el0); > > > > It may be worth only calling static_branch_enable_cpuslocked() if not > > already set, in case you try this on a system with lots of CPUs. > > static_key_enable_cpuslocked() already checks this early on, so I don't > think we need another check here (note that we're not calling stop_machine() > here _anyway_; the '_cpuslocked' suffix just says that we're already holding > cpu_hotplug_lock via the notifier). Ah, you are right, no need for an additional check. -- Catalin