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[23.128.96.18]) by mx.google.com with ESMTP id n15si13615050edy.29.2021.05.24.07.48.50; Mon, 24 May 2021 07:49:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233118AbhEXOqw (ORCPT + 99 others); Mon, 24 May 2021 10:46:52 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:55129 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233049AbhEXOqn (ORCPT ); Mon, 24 May 2021 10:46:43 -0400 X-UUID: 873d7e7f9c3a41c78c125d6b5399dd78-20210524 X-UUID: 873d7e7f9c3a41c78c125d6b5399dd78-20210524 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1745678309; Mon, 24 May 2021 20:29:11 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 24 May 2021 20:29:10 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 24 May 2021 20:29:10 +0800 From: Chun-Jie Chen To: Matthias Brugger , Stephen Boyd , Nicolas Boichat , Rob Herring CC: , , , , , , , Weiyi Lu , "chun-jie . chen" Subject: [PATCH v9 03/22] dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller Date: Mon, 24 May 2021 20:20:34 +0800 Message-ID: <20210524122053.17155-4-chun-jie.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210524122053.17155-1-chun-jie.chen@mediatek.com> References: <20210524122053.17155-1-chun-jie.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the new binding documentation of msdc controller for Mediatek MT8192. Signed-off-by: Weiyi Lu Signed-off-by: chun-jie.chen --- .../bindings/arm/mediatek/mediatek,msdc.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml new file mode 100644 index 000000000000..10eb43de2d2b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,msdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MSDC Controller + +maintainers: + - Chun-Jie Chen + +description: + The Mediatek msdc controller provides functional configurations and clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-msdc + - mediatek,mt8192-msdc_top + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + msdc: syscon@11f60000 { + compatible = "mediatek,mt8192-msdc", "syscon"; + reg = <0x11f60000 0x1000>; + #clock-cells = <1>; + }; + + - | + msdc_top: syscon@11f10000 { + compatible = "mediatek,mt8192-msdc_top", "syscon"; + reg = <0x11f10000 0x1000>; + #clock-cells = <1>; + }; -- 2.18.0