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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB4388.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 64231ff0-511a-4e30-1eb4-08d91ed2c561 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 May 2021 16:41:25.2012 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: aHYU5VvyyvhycC+Tv0lVuSfnhZocV9iKqbMm0nDJ7Jg64i1pMNYZOmm92cL1kMcL2EHaIQb1iInQ9i3r3LXb6A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3833 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Official Use Only] Hi Boris My apologies for delayed response. Thanks for your review comments, will su= bmit a v2 shortly. Regards, Naveenk -----Original Message----- From: Borislav Petkov =20 Sent: Tuesday, May 11, 2021 10:57 PM To: Chatradhi, Naveen Krishna Cc: linux-edac@vger.kernel.org; x86@kernel.org; linux-kernel@vger.kernel.or= g; mingo@redhat.com; mchehab@kernel.org; M K, Muralidhara Subject: Re: [PATCH 1/3] x86/MCE/AMD, EDAC/mce_amd: Add new SMCA bank types= . [CAUTION: External Email] On Tue, May 11, 2021 at 08:55:36PM +0530, Naveen Krishna Chatradhi wrote: > diff --git a/arch/x86/kernel/cpu/mce/amd.c=20 > b/arch/x86/kernel/cpu/mce/amd.c index e486f96b3cb3..055f3a0acf5e=20 > 100644 > --- a/arch/x86/kernel/cpu/mce/amd.c > +++ b/arch/x86/kernel/cpu/mce/amd.c > @@ -90,6 +90,7 @@ static struct smca_bank_name smca_names[] =3D { > [SMCA_CS_V2] =3D { "coherent_slave", "Coherent Slave" }, > [SMCA_PIE] =3D { "pie", "Power, Interrupts, etc."= }, > [SMCA_UMC] =3D { "umc", "Unified Memory Controlle= r" }, > + [SMCA_UMC_V2] =3D { "umc_v2", "Unified Memory Controlle= r" }, So this is called "umc_v2" but the other V2 FUs's strings are the same. Why? [naveenk:] There is a possibility for a heterogenous system with both the S= MCA_UMC and SMCA_UMC_V2 variant of controllers to exist. I will update the long name to describe accordingly. Also, if you're going to repeat strings, you can just as well group all tho= se which are the same this way: [ SMCA_UMC ... SMCA_UMC_V2 ] =3D { "umc", "Unified = Memory Controller" }, and do that for all which have V1 and V2. I mean, gcc is smart enough to do that behind the scenes for identical stri= ngs but you should do that in C too. [naveenk:] thanks for the suggestion, I can do this for the other units. > diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index=20 > 5dd905a3f30c..5515fd9336b1 100644 > --- a/drivers/edac/mce_amd.c > +++ b/drivers/edac/mce_amd.c > @@ -323,6 +323,21 @@ static const char * const smca_umc_mce_desc[] =3D { > "AES SRAM ECC error", > }; > > +static const char * const smca_umc2_mce_desc[] =3D { Ok, gcc reuses the identical string pointers from smca_umc_mce_desc[] so we= should be ok wrt duplication. > + "DRAM ECC error", > + "Data poison error", > + "SDP parity error", > + "Reserved", > + "Address/Command parity error", > + "Write data parity error", > + "DCQ SRAM ECC error", > + "Reserved", > + "Read data parity error", > + "Rdb SRAM ECC error", > + "RdRsp SRAM ECC error", > + "LM32 MP errors", > +}; ... > +static const char * const smca_xgmipcs_mce_desc[] =3D { > + "DataLossErr", > + "TrainingErr", > + "FlowCtrlAckErr", > + "RxFifoUnderflowErr", > + "RxFifoOverflowErr", > + "CRCErr", > + "BERExceededErr", > + "TxVcidDataErr", > + "ReplayBufParityErr", > + "DataParityErr", > + "ReplayFifoOverflowErr", > + "ReplayFIfoUnderflowErr", > + "ElasticFifoOverflowErr", > + "DeskewErr", > + "FlowCtrlCRCErr", > + "DataStartupLimitErr", > + "FCInitTimeoutErr", > + "RecoveryTimeoutErr", > + "ReadySerialTimeoutErr", > + "ReadySerialAttemptErr", > + "RecoveryAttemptErr", > + "RecoveryRelockAttemptErr", > + "ReplayAttemptErr", > + "SyncHdrErr", > + "TxReplayTimeoutErr", > + "RxReplayTimeoutErr", > + "LinkSubTxTimeoutErr", > + "LinkSubRxTimeoutErr", > + "RxCMDPktErr", What happened to those and why aren't they proper words like the other erro= r descriptions? [naveenk:] Will change these into proper words. Thx. -- Regards/Gruss, Boris. https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fpeople.= kernel.org%2Ftglx%2Fnotes-about-netiquette&data=3D04%7C01%7CNaveenKrish= na.Chatradhi%40amd.com%7C9159e5c1aebd47969c2508d914a20789%7C3dd8961fe4884e6= 08e11a82d994e183d%7C0%7C0%7C637563508427766424%7CUnknown%7CTWFpbGZsb3d8eyJW= IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&s= data=3D%2FiHUZDkg99NnGdDrOCK%2FQWsui2yA1dADCfG%2F4xFr%2B7I%3D&reserved= =3D0