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[23.128.96.18]) by mx.google.com with ESMTP id c12si15272386eds.251.2021.05.25.08.56.56; Tue, 25 May 2021 08:57:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=huawei.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232802AbhEYMsW (ORCPT + 99 others); Tue, 25 May 2021 08:48:22 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:6706 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232222AbhEYMsR (ORCPT ); Tue, 25 May 2021 08:48:17 -0400 Received: from dggems705-chm.china.huawei.com (unknown [172.30.72.58]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FqDJZ0fQtzlYbD; Tue, 25 May 2021 20:43:10 +0800 (CST) Received: from dggema757-chm.china.huawei.com (10.1.198.199) by dggems705-chm.china.huawei.com (10.3.19.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Tue, 25 May 2021 20:46:46 +0800 Received: from localhost.localdomain (10.69.192.56) by dggema757-chm.china.huawei.com (10.1.198.199) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 25 May 2021 20:46:45 +0800 From: Qi Liu To: , , CC: , , , , Subject: [PATCH v5 0/2] drivers/perf: hisi: Add support for PCIe PMU Date: Tue, 25 May 2021 20:46:33 +0800 Message-ID: <1621946795-14046-1-git-send-email-liuqi115@huawei.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems702-chm.china.huawei.com (10.3.19.179) To dggema757-chm.china.huawei.com (10.1.198.199) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset adds support for HiSilicon PCIe Performance Monitoring Unit(PMU). It is a PCIe Root Complex integrated End Point(RCiEP) device added on Hip09. Each PCIe Core has a PMU RCiEP to monitor multi root ports and all Endpoints downstream these root ports. HiSilicon PCIe PMU is supported to collect performance data of PCIe bus, such as: bandwidth, latency etc. This patchset is based on 5.13-rc3. Changes since v4: - Replace irq_set_affinity_hint() with irq_set_affinity(). - Link: https://lore.kernel.org/linux-arm-kernel/1621417741-5229-1-git-send-email-liuqi115@huawei.com/ Changes since v3: - Fix some warnings when build under 32bits architecture. - Address the comments from John. - Link: https://lore.kernel.org/linux-arm-kernel/1618490885-44612-1-git-send-email-liuqi115@huawei.com/ Changes since v2: - Address the comments from John. - Link: https://lore.kernel.org/linux-arm-kernel/1617959157-22956-1-git-send-email-liuqi115@huawei.com/ Changes since v1: - Drop the internal Reviewed-by tag. - Fix some build warnings when W=1. - Link: https://lore.kernel.org/linux-arm-kernel/1617788943-52722-1-git-send-email-liuqi115@huawei.com/ Qi Liu (2): docs: perf: Add description for HiSilicon PCIe PMU driver drivers/perf: hisi: Add driver for HiSilicon PCIe PMU Documentation/admin-guide/perf/hisi-pcie-pmu.rst | 104 +++ MAINTAINERS | 6 + drivers/perf/Kconfig | 2 + drivers/perf/Makefile | 1 + drivers/perf/pci/Kconfig | 16 + drivers/perf/pci/Makefile | 2 + drivers/perf/pci/hisilicon/Makefile | 3 + drivers/perf/pci/hisilicon/hisi_pcie_pmu.c | 1016 ++++++++++++++++++++++ include/linux/cpuhotplug.h | 1 + 9 files changed, 1151 insertions(+) create mode 100644 Documentation/admin-guide/perf/hisi-pcie-pmu.rst create mode 100644 drivers/perf/pci/Kconfig create mode 100644 drivers/perf/pci/Makefile create mode 100644 drivers/perf/pci/hisilicon/Makefile create mode 100644 drivers/perf/pci/hisilicon/hisi_pcie_pmu.c -- 2.7.4