Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp5097562pxj; Wed, 26 May 2021 02:47:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzypHi0h3wJWWyBmJQ8c2e0V4GzJkpbCsCCNTKRgBlxWeA7YlNixLV2S0PY8oJG/GaPiLZM X-Received: by 2002:a05:6402:3511:: with SMTP id b17mr36098728edd.71.1622022467241; Wed, 26 May 2021 02:47:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622022467; cv=none; d=google.com; s=arc-20160816; b=F8MIOv+wzXgrDZjNUYWB2zszfDlJTF14YGzAI38yDlIkbb8s7t+52MqM1ds7z40CQT KUlkVymS3/71SK9k9tuhJQ0fQETyoNbGwMKG4gh1kMb7HmB+ehiRqCWuHFDMT9KJVUJu tgZunZ8lHTpuK7OZWBgS2GC/HDnou6rmMoZen/gjYvs8b6ImotDIfAhvaf1Js+cmkY3o CNOJnitJRTBHWt4Cw4g3mfkDMITah7uvJHhGan493xlNucssdr2Mam8EtYRpwioT3r4X AV7/XoCYrXzIvqQrUTufj3E4Gtqj2svxTByilN3crtaxUR8qSYwhE3gtSpF5diwiJOuu jibw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=nvywk2SWj1UT9JYbNcM9gNb/y84QYctKW1MfqsFs2WY=; b=kQ64VW3R/UkVZCrR15xfUBxunR0PgWmnpoQPShOTUVnrGdqWrJ4dKQtwe7qdVsDcLI dM7TUV1ZZ/e8NkoqOYKUZxCgEzxjA1JtP4fYM0mloolHgB+W4MMNJOss2vVF+Xy0MW61 i7iEMiTBos8xVl61lsh+JpbeezyEsnNQ2FFPGy1gF2a1Tm/SH2TMJURdH30FmZfeoPlP 9JM3pphIxwawBWi6TCBGYMx0aTvtGg7exGLgDC8I4tDgnLcyk0Gg7tEVqXG9rVbZ1VNa np8G8L+GTCeNxdeZDcMTZ4YryfY2Fqw7bBwrZ5aUnD2bp5sekS+LtSTS0cQYtfhvxHp+ L1gw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id am8si17741411ejc.753.2021.05.26.02.47.24; Wed, 26 May 2021 02:47:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233425AbhEZJrr (ORCPT + 99 others); Wed, 26 May 2021 05:47:47 -0400 Received: from twspam01.aspeedtech.com ([211.20.114.71]:14796 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233157AbhEZJrq (ORCPT ); Wed, 26 May 2021 05:47:46 -0400 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 14Q9X9CB082694; Wed, 26 May 2021 17:33:09 +0800 (GMT-8) (envelope-from steven_lee@aspeedtech.com) Received: from slee-VirtualBox.localdomain (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 26 May 2021 17:46:11 +0800 From: Steven Lee To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Joel Stanley , Andrew Jeffery , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list CC: , , , Subject: [PATCH v1 0/4] ASPEED sgpio driver enhancement. Date: Wed, 26 May 2021 17:46:04 +0800 Message-ID: <20210526094609.14068-1-steven_lee@aspeedtech.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 14Q9X9CB082694 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that supports up to 80 pins. In the current driver design, the max number of sgpio pins is hardcoded in macro MAX_NR_HW_SGPIO and the value is 80. For supporting sgpio master interfaces of AST2600 SoC, the patch series contains the following enhancement: - Convert txt dt-bindings to yaml. - Update aspeed dtsi to support the enhanced sgpio. - Get the max number of sgpio that SoC supported from dts. - Support muiltiple SGPIO master interfaces. - Support up to 128 pins. Please help to review. Thanks, Steven Steven Lee (4): dt-bindings: aspeed-sgpio: Convert txt bindings to yaml. ARM: dts: aspeed-g6: Add SGPIO node. ARM: dts: aspeed-g5: Modify sgpio node for the enhanced sgpio driver. gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support .../bindings/gpio/aspeed,sgpio.yaml | 91 +++++++++ .../devicetree/bindings/gpio/sgpio-aspeed.txt | 46 ----- arch/arm/boot/dts/aspeed-g5.dtsi | 3 +- arch/arm/boot/dts/aspeed-g6.dtsi | 32 +++ drivers/gpio/gpio-aspeed-sgpio.c | 193 ++++++++++++------ 5 files changed, 250 insertions(+), 115 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml delete mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt -- 2.17.1