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[23.128.96.18]) by mx.google.com with ESMTP id b11si831868jat.37.2021.05.26.18.46.15; Wed, 26 May 2021 18:46:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233951AbhE0A4g (ORCPT + 99 others); Wed, 26 May 2021 20:56:36 -0400 Received: from twspam01.aspeedtech.com ([211.20.114.71]:19919 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232692AbhE0A4f (ORCPT ); Wed, 26 May 2021 20:56:35 -0400 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 14R0fqW4067370; Thu, 27 May 2021 08:41:52 +0800 (GMT-8) (envelope-from steven_lee@aspeedtech.com) Received: from slee-VirtualBox.localdomain (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 27 May 2021 08:54:55 +0800 From: Steven Lee To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Joel Stanley , Andrew Jeffery , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list CC: , , , Subject: [PATCH v2 0/4] ASPEED sgpio driver enhancement. Date: Thu, 27 May 2021 08:54:49 +0800 Message-ID: <20210527005455.25758-1-steven_lee@aspeedtech.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 14R0fqW4067370 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that supports up to 80 pins. In the current driver design, the max number of sgpio pins is hardcoded in macro MAX_NR_HW_SGPIO and the value is 80. For supporting sgpio master interfaces of AST2600 SoC, the patch series contains the following enhancement: - Convert txt dt-bindings to yaml. - Update aspeed dtsi to support the enhanced sgpio. - Get the max number of sgpio that SoC supported from dts. - Support muiltiple SGPIO master interfaces. - Support up to 128 pins. Changes from v1: * Fix yaml format issues. * Fix issues reported by kernel test robot. Please help to review. Thanks, Steven Steven Lee (4): dt-bindings: aspeed-sgpio: Convert txt bindings to yaml. ARM: dts: aspeed-g6: Add SGPIO node. ARM: dts: aspeed-g5: Modify sgpio node for the enhanced sgpio driver. gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support .../bindings/gpio/aspeed,sgpio.yaml | 91 +++++++++ .../devicetree/bindings/gpio/sgpio-aspeed.txt | 46 ----- arch/arm/boot/dts/aspeed-g5.dtsi | 3 +- arch/arm/boot/dts/aspeed-g6.dtsi | 32 +++ drivers/gpio/gpio-aspeed-sgpio.c | 193 ++++++++++++------ 5 files changed, 250 insertions(+), 115 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml delete mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt -- 2.17.1