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Tsirkin" CC: , , Subject: Re: [PATCH v1] vdpa/mlx5: Fix umem sizes assignments on VQ create Message-ID: <20210530085352.GC120901@mtl-vdi-166.wap.labs.mlnx> References: <20210530083548.6545-1-elic@nvidia.com> <20210530043721-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20210530043721-mutt-send-email-mst@kernel.org> User-Agent: Mutt/1.9.5 (bf161cf53efb) (2018-04-13) X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f122df58-32e1-4f5d-e622-08d923487605 X-MS-TrafficTypeDiagnostic: BN6PR1201MB0001: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:462; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3P0QvJJ+W+fxWoeYTWirvfc6R19j96EgXsfmveFN2cgs4fWAKdJSFmlt6euMy8sFpgg4OSfCXkS2tY1waYylfqafRXPdf4Q1ptyuwfTTg3nJ8p/m77HuwRZmVIvkRn4M6XG/pNIRAcVcpdKnYK+JzP2nhwT9oHFPE1zvkx6gL3VMKbns7WIYE1+QO70zOnH8Ca39NZidUp29f3kpx1m4dFaS0t+jjSNP1K5K+Y5qlkiLhz/s5CyAa7lfQOTrLCn+bha46Ay8vlwCmhzJTfFlJ2cQ8EpsSva8EtsD5GWSyPF5q/FeSLqe2IIZISVxnN4kXxtf2ryRTeS5j8w88ULW81NwspJLow9kFdM2rf5iyBp/9h3Htpt4FwTvtWGCGL7HiOl+suUXoTwzqRdLhnvGHss/tNHuaO5IlBFxrhsRKMJEtUuB33okowqxp9ke+1XhGyifzUwSKTqm1PQ2TvlJZBvHE6XppD6YxXE/WgsjRiw2dh0Z0+cHf20rqif6ebDXm97CmKVL1U5Fx7Sh73MNKpf1L+MtwF2s7OOz+zodooqx2gkTGWFtQ06MHFVcqopxRMmrK2Qdd5Uagy2SDSVEu9oEYLKg1qOZWZqqR/MznGZV4/Bg8bR4xKy66vivE4iU13yais4pQsTcyVXtH6QOAKlnPmfy11F/NpUbmEEimIM= X-Forefront-Antispam-Report: CIP:216.228.112.34;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid03.nvidia.com;CAT:NONE;SFS:(4636009)(136003)(396003)(376002)(39860400002)(346002)(36840700001)(46966006)(4326008)(36860700001)(26005)(70586007)(7636003)(426003)(47076005)(478600001)(82740400003)(7696005)(5660300002)(54906003)(33656002)(316002)(9686003)(2906002)(1076003)(356005)(186003)(6666004)(336012)(6916009)(82310400003)(8936002)(8676002)(70206006)(55016002)(36906005)(86362001)(16526019)(83380400001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 May 2021 08:53:57.3252 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f122df58-32e1-4f5d-e622-08d923487605 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT036.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR1201MB0001 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 30, 2021 at 04:37:39AM -0400, Michael S. Tsirkin wrote: > On Sun, May 30, 2021 at 11:35:48AM +0300, Eli Cohen wrote: > > Fix copy paste bug assigning umem1 size to umem2 and umem3. The issue > > was discovered when trying to use a 1:1 MR that covers the entire > > address space where firmware complained that provided sizes are not > > large enough. > > .. creating the virtqueue then fails? > > > 1:1 MRs are requied to support virtio_vdpa. > > typo > thanks > > > > Fixes: 1a86b377aa21 ("vdpa/mlx5: Add VDPA driver for supported mlx5 devices") > > Signed-off-by: Eli Cohen > > --- > > V0 --> V1: > > Add more information in changelog > > > > drivers/vdpa/mlx5/net/mlx5_vnet.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5_vnet.c > > index 189e4385df40..53312f0460ad 100644 > > --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c > > +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c > > @@ -828,9 +828,9 @@ static int create_virtqueue(struct mlx5_vdpa_net *ndev, struct mlx5_vdpa_virtque > > MLX5_SET(virtio_q, vq_ctx, umem_1_id, mvq->umem1.id); > > MLX5_SET(virtio_q, vq_ctx, umem_1_size, mvq->umem1.size); > > MLX5_SET(virtio_q, vq_ctx, umem_2_id, mvq->umem2.id); > > - MLX5_SET(virtio_q, vq_ctx, umem_2_size, mvq->umem1.size); > > + MLX5_SET(virtio_q, vq_ctx, umem_2_size, mvq->umem2.size); > > MLX5_SET(virtio_q, vq_ctx, umem_3_id, mvq->umem3.id); > > - MLX5_SET(virtio_q, vq_ctx, umem_3_size, mvq->umem1.size); > > + MLX5_SET(virtio_q, vq_ctx, umem_3_size, mvq->umem3.size); > > MLX5_SET(virtio_q, vq_ctx, pd, ndev->mvdev.res.pdn); > > if (MLX5_CAP_DEV_VDPA_EMULATION(ndev->mvdev.mdev, eth_frame_offload_type)) > > MLX5_SET(virtio_q, vq_ctx, virtio_version_1_0, 1); > > -- > > 2.31.1 >