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Mon, 31 May 2021 04:59:19 +0000 Received: from mtl-vdi-166.wap.labs.mlnx (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 May 2021 04:59:18 +0000 Date: Mon, 31 May 2021 07:59:14 +0300 From: Eli Cohen To: Jason Wang CC: , , Subject: Re: [PATCH 1/2] vdpa/mlx5: Support creating resources with uid == 0 Message-ID: <20210531045914.GB158940@mtl-vdi-166.wap.labs.mlnx> References: <20210530075415.4644-1-elic@nvidia.com> <20210530075415.4644-2-elic@nvidia.com> <7e4f741e-e595-fe19-91ef-e6faeec765d4@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.9.5 (bf161cf53efb) (2018-04-13) X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f1e109c1-ccdb-451b-7970-08d923f0d9a4 X-MS-TrafficTypeDiagnostic: CH0PR12MB5106: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3276; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 May 2021 04:59:19.9014 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f1e109c1-ccdb-451b-7970-08d923f0d9a4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5106 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 31, 2021 at 11:06:59AM +0800, Jason Wang wrote: > > 在 2021/5/31 上午11:02, Jason Wang 写道: > > > > 在 2021/5/30 下午3:54, Eli Cohen 写道: > > > Currently all resources must be created with uid != 0 which is essential > > > userspace processes allocating virtquueue resources. Since this is a > > > kernel implementation, it is perfectly legal to open resources with > > > uid == 0. > > > > > > In case frimware supports, avoid allocating user context. > > > > > > Typo "frimware". > > > > Otherwise. > > > > Acked-by: Jason Wang > > > > (I don't see any code to check the firmware capability, is this > > intended?) > > > Speak too fast. I see the MLX5_CAP_GEN(), so it's fine. And I responded too fast :-) > > Thanks > > > > > > Thanks > > > > > > > > > > Signed-off-by: Eli Cohen > > > --- > > >   drivers/vdpa/mlx5/core/resources.c | 6 ++++++ > > >   include/linux/mlx5/mlx5_ifc.h      | 4 +++- > > >   2 files changed, 9 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/vdpa/mlx5/core/resources.c > > > b/drivers/vdpa/mlx5/core/resources.c > > > index 6521cbd0f5c2..836ab9ef0fa6 100644 > > > --- a/drivers/vdpa/mlx5/core/resources.c > > > +++ b/drivers/vdpa/mlx5/core/resources.c > > > @@ -54,6 +54,9 @@ static int create_uctx(struct mlx5_vdpa_dev > > > *mvdev, u16 *uid) > > >       void *in; > > >       int err; > > >   +    if (MLX5_CAP_GEN(mvdev->mdev, umem_uid_0)) > > > +        return 0; > > > + > > >       /* 0 means not supported */ > > >       if (!MLX5_CAP_GEN(mvdev->mdev, log_max_uctx)) > > >           return -EOPNOTSUPP; > > > @@ -79,6 +82,9 @@ static void destroy_uctx(struct mlx5_vdpa_dev > > > *mvdev, u32 uid) > > >       u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {}; > > >       u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {}; > > >   +    if (!uid) > > > +        return; > > > + > > >       MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX); > > >       MLX5_SET(destroy_uctx_in, in, uid, uid); > > >   diff --git a/include/linux/mlx5/mlx5_ifc.h > > > b/include/linux/mlx5/mlx5_ifc.h > > > index 9c68b2da14c6..606d2aeacad4 100644 > > > --- a/include/linux/mlx5/mlx5_ifc.h > > > +++ b/include/linux/mlx5/mlx5_ifc.h > > > @@ -1487,7 +1487,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { > > >       u8         uar_4k[0x1]; > > >       u8         reserved_at_241[0x9]; > > >       u8         uar_sz[0x6]; > > > -    u8         reserved_at_250[0x8]; > > > +    u8         reserved_at_248[0x2]; > > > +    u8         umem_uid_0[0x1]; > > > +    u8         reserved_at_250[0x5]; > > >       u8         log_pg_sz[0x8]; > > >         u8         bf[0x1]; >