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Date:   Mon, 31 May 2021 11:37:08 +0200
From:   Joerg Roedel <jroedel@suse.de>
To:     Pu Wen <puwen@hygon.cn>
Cc:     Sean Christopherson <seanjc@google.com>, x86@kernel.org,
        joro@8bytes.org, thomas.lendacky@amd.com,
        dave.hansen@linux.intel.com, peterz@infradead.org,
        tglx@linutronix.de, mingo@redhat.com, bp@suse.de, hpa@zytor.com,
        sashal@kernel.org, gregkh@linuxfoundation.org,
        linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        stable@vger.kernel.org
Subject: Re: [PATCH] x86/sev: Check whether SEV or SME is supported first
Message-ID: <YLSuRBzM6piigP8t@suse.de>
References: <20210526072424.22453-1-puwen@hygon.cn>
 <YK6E5NnmRpYYDMTA@google.com>
 <905ecd90-54d2-35f1-c8ab-c123d8a3d9a0@hygon.cn>
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On Thu, May 27, 2021 at 11:08:32PM +0800, Pu Wen wrote:
> Reading MSR_AMD64_SEV which is not implemented on Hygon Dhyana CPU will cause
> the kernel reboot, and native_read_msr_safe() has no help.

The reason for the reboot is that there is no #GP or #DF handler set up
when this MSR is read, so its propagated to a shutdown event. But there
is an IDT already, so you can set up early and #GP handler to fix the
reboot.

Regards,

	Joerg