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Shutemov" To: Dave Hansen Cc: Sean Christopherson , "Kuppuswamy, Sathyanarayanan" , Peter Zijlstra , Andy Lutomirski , Dan Williams , Tony Luck , Andi Kleen , Kirill Shutemov , Kuppuswamy Sathyanarayanan , Raj Ashok , linux-kernel@vger.kernel.org Subject: Re: [RFC v2 27/32] x86/tdx: Exclude Shared bit from __PHYSICAL_MASK Message-ID: <20210531214602.qd6r63s5jbr4vcm5@box> References: <87b31425b79df3cc44d2bdc6a79d6aa36c42d116.1619458733.git.sathyanarayanan.kuppuswamy@linux.intel.com> <3ae38a0b-0676-1543-7015-39a589b2807a@intel.com> <0df80c0f-e0da-e86e-0ab8-abc58f0da559@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 20, 2021 at 01:56:13PM -0700, Dave Hansen wrote: > On 5/20/21 1:16 PM, Sean Christopherson wrote: > > On Thu, May 20, 2021, Kuppuswamy, Sathyanarayanan wrote: > >> So what is your proposal? "tdx_guest_" / "tdx_host_" ? > > 1. Abstract things where appropriate, e.g. I'm guessing there is a clever way > > to deal with the shared vs. private inversion and avoid tdg_shared_mask > > altogether. > > One example here would be to keep a structure like: > > struct protected_mem_config > { > unsigned long p_set_bits; > unsigned long p_clear_bits; > } > > Where 'p_set_bits' are the bits that need to be set to establish memory > protection and 'p_clear_bits' are the bits that need to be cleared. > physical_mask would clear both of them: > > physical_mask &= ~(pmc.p_set_bits & pmc.p_set_bits); For me it looks like an abstraction for sake of abstraction. More levels of indirection without clear benefit. It doesn't add any more readability: would you know what 'p_set_bits' stands for in two month? I'm not sure. I would rather leave explicit check for protection flavour. It provides better context for a reader. -- Kirill A. Shutemov