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Tsirkin" CC: , , Subject: Re: [PATCH v1 1/2] vdpa/mlx5: Support creating resources with uid == 0 Message-ID: <20210601043529.GA205415@mtl-vdi-166.wap.labs.mlnx> References: <20210531160404.31368-1-elic@nvidia.com> <20210531181704-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20210531181704-mutt-send-email-mst@kernel.org> User-Agent: Mutt/1.9.5 (bf161cf53efb) (2018-04-13) X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL105.nvidia.com (172.20.187.12) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 102b0303-4ecd-48e3-ff87-08d924b6b2f9 X-MS-TrafficTypeDiagnostic: MW2PR12MB2361: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2000; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ZkoCMhhuSB73WpHzcCHiWZQ13SexvaqkIgzbmmzqwmNggilhPXDGPOFVNHONZlqO2nwLSr9SAY9jUCP7at4sl6pq+VpS1JAephCvdjVIDWBVgZcovjPRY5ecMlU0YbnL+MSmo4+Npfx4IO6QvV86j7ddfZA/g5j8xpeMg48HQPUuTviuqD2ndbrcY+aavZ+wJnM+Vn9hD1TCzw+RFFWm6zn/lGERw16MOZs0KezcKkRbbtO3Y6DTeZbspkircZgGQabtCXnBJlhIMScXwtFyRRKw5l+GL38ULjJxq0bVCi09cj/pTqhI0ABEYQkcxnUnmYDfluMFzLG8fj/bKrXvgOikNSbUpx2k2yRcijFpAn2n9Tt/cU7Cn40l2dm2XGr5Bm3dW8MXFCnzf2rrL9fIixz8OIUqwAhHR3m4ApqxUuTot2dCqjwpYRf9CoqUvUSoxhwgBoYgNE/4Z8XT87gXCTpINYziG/O/Gge24011EVHbc/K9mnf7vyUotjt4S0MtPw4pvndUz+MTV04QBtCpgeiUhe9gHgSIZFPfIg+rHazo7s0QsoA/nME3Z/25rjSbwHWU+cBw3JmRxMvlX3Ahi6IXb8wFQo5e+l5ovd4HwSuD6DgZfRDvo4igpNJ/jlcFzTtz7mHeGBqT1mpo8tq91DfgZ9Jfd3204j/nKKFkiM8= X-Forefront-Antispam-Report: CIP:216.228.112.34;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid03.nvidia.com;CAT:NONE;SFS:(4636009)(136003)(396003)(346002)(376002)(39860400002)(46966006)(36840700001)(4326008)(426003)(8676002)(2906002)(16526019)(36860700001)(70586007)(8936002)(47076005)(83380400001)(82310400003)(5660300002)(336012)(6666004)(26005)(86362001)(70206006)(186003)(33656002)(478600001)(316002)(36906005)(9686003)(54906003)(55016002)(7696005)(356005)(7636003)(1076003)(82740400003)(6916009);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jun 2021 04:35:35.3872 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 102b0303-4ecd-48e3-ff87-08d924b6b2f9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT054.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2361 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 31, 2021 at 06:17:12PM -0400, Michael S. Tsirkin wrote: > On Mon, May 31, 2021 at 07:04:04PM +0300, Eli Cohen wrote: > > Currently all resources must be created with uid != 0 which is essential > > when userspace processes are allocating virtquueue resources. Since this > > is a kernel implementation, it is perfectly legal to open resources with > > uid == 0. > > > > In case firmware supports, avoid allocating user context. > > > > Signed-off-by: Eli Cohen > > --- > > v0 --> v1: > > Fix typo and modify phrasing > > threading's broken now Sorry about this, will repost again. > > > drivers/vdpa/mlx5/core/resources.c | 6 ++++++ > > include/linux/mlx5/mlx5_ifc.h | 4 +++- > > 2 files changed, 9 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/vdpa/mlx5/core/resources.c b/drivers/vdpa/mlx5/core/resources.c > > index 6521cbd0f5c2..836ab9ef0fa6 100644 > > --- a/drivers/vdpa/mlx5/core/resources.c > > +++ b/drivers/vdpa/mlx5/core/resources.c > > @@ -54,6 +54,9 @@ static int create_uctx(struct mlx5_vdpa_dev *mvdev, u16 *uid) > > void *in; > > int err; > > > > + if (MLX5_CAP_GEN(mvdev->mdev, umem_uid_0)) > > + return 0; > > + > > /* 0 means not supported */ > > if (!MLX5_CAP_GEN(mvdev->mdev, log_max_uctx)) > > return -EOPNOTSUPP; > > @@ -79,6 +82,9 @@ static void destroy_uctx(struct mlx5_vdpa_dev *mvdev, u32 uid) > > u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {}; > > u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {}; > > > > + if (!uid) > > + return; > > + > > MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX); > > MLX5_SET(destroy_uctx_in, in, uid, uid); > > > > diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h > > index 9c68b2da14c6..606d2aeacad4 100644 > > --- a/include/linux/mlx5/mlx5_ifc.h > > +++ b/include/linux/mlx5/mlx5_ifc.h > > @@ -1487,7 +1487,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { > > u8 uar_4k[0x1]; > > u8 reserved_at_241[0x9]; > > u8 uar_sz[0x6]; > > - u8 reserved_at_250[0x8]; > > + u8 reserved_at_248[0x2]; > > + u8 umem_uid_0[0x1]; > > + u8 reserved_at_250[0x5]; > > u8 log_pg_sz[0x8]; > > > > u8 bf[0x1]; > > -- > > 2.31.1 >