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[23.128.96.18]) by mx.google.com with ESMTP id v6si16568820edc.364.2021.06.01.03.01.09; Tue, 01 Jun 2021 03:01:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P0mZDtgn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230282AbhFAKBF (ORCPT + 99 others); Tue, 1 Jun 2021 06:01:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230308AbhFAKBF (ORCPT ); Tue, 1 Jun 2021 06:01:05 -0400 Received: from mail-lf1-x12a.google.com (mail-lf1-x12a.google.com [IPv6:2a00:1450:4864:20::12a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF112C06175F for ; Tue, 1 Jun 2021 02:59:23 -0700 (PDT) Received: by mail-lf1-x12a.google.com with SMTP id x38so20835996lfa.10 for ; Tue, 01 Jun 2021 02:59:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=2W6uim/mGDin/FJYZH96yxsKQsl+UwiwSGvJzTSgiW4=; b=P0mZDtgnoKk2E9LA8Xx97KeYoyyRE79OQ5TnUfPfYyFya3a6MKnLY0W1ZtUDFUU+11 RDDsk9f4VFPxuR/ZWjXuwkrCH8jMsT/11H82ifPUW/OU3IwhCQO/Z3Y/0uMvndX7Xu3o 2C+UFCcvza21W5YDotUFlzhq+ycUOT/pUMFnFT2llRw6wysgxeSqUcUHYIGaIxC3yPSj 0lTr07owbwPftwWM6loybaiLzRlxlfUKo6tW/GSrFtNfoxIjg+BCCvp+rO1PqeZPpdzU JG20KMtedWg8MD2K76uWb0BQX0GnG7Wrj4N+RgUqXHt0YFM6gxWgEGLZzQ32tzb5Rk1e w54Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=2W6uim/mGDin/FJYZH96yxsKQsl+UwiwSGvJzTSgiW4=; b=Hu55l9bQK/tzdYjWjg3fwJXO0wrSMP3XXppa0Z9DDZTZhXBCvqTsbObgoH8GTssXQg eMyFIjCQWkcmCzrCtjEX7iCLeGciJomDJKQAqYF4gTCgucq88sMVpVk1td948H7h10QJ z5O23WGD5ivnCyQi7bWcJVq6g5GPv6UtT+RqF41M+mRzRXHyD7T3O/aOIkUFVg0Uv5aC xmI5maKXhyNj5NtAqkGlqf1e9bR231g8Oh87S8/HtQCztgMr9NgpkX7YmzvpYzUDzSe4 9kmEPaXEzqtmC9D2QWZnHRR6pC5LdLfY0BFOHEBDiDyJcctK7aREC5Lmow329/z52fSN oLfw== X-Gm-Message-State: AOAM533yrD5ZcEyKUPzHnu1nhTmJ2BpAT+DCGTUC8z+j18vVJzuTFruo hzgqcQhjh8d0Xt5w1i5SKA0qODreBFWnBduMLWmYMA== X-Received: by 2002:a05:6512:3241:: with SMTP id c1mr9699263lfr.29.1622541561986; Tue, 01 Jun 2021 02:59:21 -0700 (PDT) MIME-Version: 1.0 References: <02bbf73ea8a14119247f07a677993aad2f45b088.camel@svanheule.net> <84352c93f27d7c8b7afea54f3932020e9cd97d02.camel@svanheule.net> In-Reply-To: From: Linus Walleij Date: Tue, 1 Jun 2021 11:59:10 +0200 Message-ID: Subject: Re: [PATCH v3 0/6] RTL8231 GPIO expander support To: Andy Shevchenko Cc: Hans de Goede , Sander Vanheule , Michael Walle , Andrew Lunn , Pavel Machek , Rob Herring , Lee Jones , Mark Brown , Greg Kroah-Hartman , "Rafael J . Wysocki" , Bartosz Golaszewski , Linux LED Subsystem , devicetree , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 30, 2021 at 8:16 PM Andy Shevchenko wrote: > On Sun, May 30, 2021 at 7:51 PM Hans de Goede wrote: > > Regmap allows you to mark certain ranges as volatile, so that they will not > > be cached, these GPIO registers containing the current pin value seems like > > a good candidate for this. This is also necessary to make reading the GPIO > > work without getting back a stale, cached value. > > After all it seems a simple missed proper register configuration in > the driver for regmap. > Oh, as usual something easy-to-solve requires tons of time to find it. :-) This is actually quite interesting. In the discussion around adding Rust support for the Linux kernel what I came to realize was that the memory safety that Rust adds is similar in application and ambition to what e.g. regmap-mmio provides. One aspect of writing kernel drivers in Rust is to always have something like regmap between your code and the hardware to strictly control the memory access pattern. After all regmap is "memory safety implemented in C". What we see in cases like this is that not only does that make things more strict and controlled (after all we have regmap for a reason) but also makes it possible to generate a whole new set of bugs by doing an error in how you specify the memory semantics. As all other paradigms, memory safety thinking implies that never specify anything wrong. Just regarding all registers/memory cells in a register page as default volatile (which is what we do a lot of the time) has its upsides: bugs like this doesn't happen. (Just some sidetracking...) Yours, Linus Walleij