Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp3364222pxj; Tue, 1 Jun 2021 03:41:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwCR2V1fx83F3mwrViGnqNvuS/e/ItUDgYT2rC0waqrT4xVS50adWVsf5WLc48GEaw3ifhJ X-Received: by 2002:aa7:cb90:: with SMTP id r16mr31794195edt.247.1622544097135; Tue, 01 Jun 2021 03:41:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622544097; cv=none; d=google.com; s=arc-20160816; b=vDqy/1kMq3iYkkoIQKQ0dcqOj0tfN5hDuUYLHpex1kUmCYKwuQB/HHTlo2TNPmHWrH qDojOtg6rJhH+bN06A/y2X+WDypoP6uWXJRGLJWkaCMFjxV0OK5ROaqIFY/ijzmdUBQc zaFZ5WMELdv/cRMxXR2y7n7HhK5jgSO+5FPHbrtdK+KpJtQZEviqkBWU2z1jBagDL+hc eWDcll5s3kkh7OTfM+Bqs2GISYSYvEKeP6h41lKXSaGnVw6MwZ/pWeNLCcRTcC4ahemO r9rjinVfZqPJeZhFINWILiYuoxA3STOPlSTkO+jKaOeLZDopz0yOdX5wQucMHtRB4FT5 n2eA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=yN5uiFBkkTeT2+j1gnjicofSI0ZU0aW0s8cvIPMUB5c=; b=PQs+1npk0dSO9ADJlv0Ma+58uCh4m3WvoEWRTPRcjhrDXXAyiOp18CQQQXxgJbnSXj wrCSjJ3cKjBAng6XZLJz40dD4mQsskrS0V6kU1vZ7Ce/PTzNVxs/xIlkgCjBmCFH+HpA hhd4p4Yo/QGsUH3X7YBisrdOVMfjJSo575Liflxd0V8YpOaowCDiBtqwpUYYMRWrxUrj 1CNHvkD1di4+JbmyOc7uYY6xcndVgutrIRWZjcRhP/dyu704zx3Sg5eIgv8NznJBq9KY RrWXc6vnSdVvi7QxEIJCKzf1yHN+OlTZRIMWXqCkeIc22T6JUXbJt+iGYrXPEq/iF1fn M59g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Yp4g9qfA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bf28si13119943edb.71.2021.06.01.03.41.14; Tue, 01 Jun 2021 03:41:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Yp4g9qfA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233397AbhFAKj6 (ORCPT + 99 others); Tue, 1 Jun 2021 06:39:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231792AbhFAKj4 (ORCPT ); Tue, 1 Jun 2021 06:39:56 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71354C061574 for ; Tue, 1 Jun 2021 03:38:14 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id x38so20994193lfa.10 for ; Tue, 01 Jun 2021 03:38:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=yN5uiFBkkTeT2+j1gnjicofSI0ZU0aW0s8cvIPMUB5c=; b=Yp4g9qfAZ2U4RijeC/9A/sXt0dNmQH8B2qgnGaUsUALb9c0wdcbuwpoelkQx97gpJ7 g1q1rUo6V/D+UN0Xy7n9Wwkh+MlP/n5z3hm41lYLlHgL+aB4y+PEHQ7/stAQvwxqoMdd KsVE/QJlsIt0BZTMveHgGG9V4wkx8m9LMjZTiY8qklY58VAkq7gXoONJ+GzdZGmtKu5f US1s4g+gA9pgtUUoc3GFG2mMLabhCX3JtI/1lwAtbqD5MjUa/nnwM/Bx3TUkeVDFis3i MgBiwJCASB7dQyqwmQH+j+6UeHjCZKrSn+ticL0q6+9zcP0gELkMRAvgr6qFvzPpuiad no8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yN5uiFBkkTeT2+j1gnjicofSI0ZU0aW0s8cvIPMUB5c=; b=WJs+d96JfVJ7lrr+dnjYuXkpGimI8u0xu7pjAwSeVkExnG+iOHTJgJDDmBTlkiiGnc 0Wl4isEFNsGE+xaW4vJjqu+HWx+qZ2D8rwyWgX65Wp4IEZrXSyu5/obdt0mFSd5q7lYF kmy/7EtL5FwQh+u+g2zsm4Q9qfadspd9oIRvsrajkCssxjMGzA4UuzsDMBsEcnph2PUt wJHLkfO2G2qI19MC0C32eWGK7hw0A0h1SzSyIoXxQu3PrTgV/3xX0lj+WlE3OgoxYyLf hfEzreyzG5j1qYRKR8h7hKKRKtux+zMaDOPfvNs/pappUOY2MukIbzOP+SQpgkba75Ms owtA== X-Gm-Message-State: AOAM530SNpLbhZNA/Ra8dnxRDFwFnAyKCnfPstyX2nqtVc+8tfk82WZW e4Vnvil7a9gyBpHr8vWoWHdRlJxFz+HQQZ0vhsQVbw== X-Received: by 2002:ac2:544f:: with SMTP id d15mr18182416lfn.465.1622543892812; Tue, 01 Jun 2021 03:38:12 -0700 (PDT) MIME-Version: 1.0 References: <20210325122832.119147-1-sandberg@mailfence.com> <20210530161333.3996-1-maukka@ext.kapsi.fi> <20210530161333.3996-3-maukka@ext.kapsi.fi> In-Reply-To: <20210530161333.3996-3-maukka@ext.kapsi.fi> From: Linus Walleij Date: Tue, 1 Jun 2021 12:38:01 +0200 Message-ID: Subject: Re: [PATCH v4 2/2] gpio: gpio-mux-input: add generic gpio input multiplexer To: Mauri Sandberg Cc: Mauri Sandberg , Andy Shevchenko , Bartosz Golaszewski , Geert Uytterhoeven , "open list:GPIO SUBSYSTEM" , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-kernel , Drew Fustini , kernel test robot Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 30, 2021 at 6:16 PM Mauri Sandberg wrote: > Adds support for a generic GPIO multiplexer. To drive the multiplexer a > mux-controller is needed. The output pin of the multiplexer is a GPIO > pin. > > Reported-by: kernel test robot > Signed-off-by: Mauri Sandberg > Tested-by: Drew Fustini > Reviewed-by: Drew Fustini The commit message and part of the driver becomes hard to read and understand because the word pin is overused. Switch to talk about "gpio lines" rather than pins. Draw a simple ASCII image like this: /|---- Cascaded GPIO line 0 |M|---- Cascaded GPIO line 1 GPIO line ----+U| . |X| . \|---- Cascaded GPIO line n Maybe also as illustration in the driver and in the bindings. Make things easy to understand. Explain exactly why only input lines can be multiplexed. I'm not sure it should be restricted to just input in theory, but since that is all we can test, restrict it to input in practice. > +config GPIO_MUX_INPUT > + tristate "General GPIO input multiplexer" Rename it just GPIO_MUX "General GPIO multiplexer" Then clarify in the help description that it currently can only handle input lines. > + depends on OF_GPIO > + select MULTIPLEXER > + select MUX_GPIO > + help > + Say yes here to enable support for generic GPIO input multiplexer. > + > + This driver uses a mux-controller to drive the multiplexer and has a > + single output pin for reading the inputs to the mux. The driver can > + be used in situations when GPIO pins are used to select what > + multiplexer pin should be used for reading input and the output pin > + of the multiplexer is connected to a GPIO input pin. Input output etc, this gets very hard to understand. Switch terminology from "pin" to "GPIO lines", (or "GPIO rails"). Use the word "routing" as the GPIO line is routed through the multiplexer. Maybe spell out multiplexer for clarity. Explain why, for electrical reasons, output lines are harder to multiplex like this, as the output will not maintain state. Notice that "using open drain constructions, output multiplexing may be possible, but it is currently not implemented." > +static int gpio_mux_input_get_direction(struct gpio_chip *gc, > + unsigned int offset) > +{ > + return GPIO_LINE_DIRECTION_IN; > +} Explain why this is a restriction with a comment in the code. Add comment that in the future we might be able to handle also output. > +static int gpio_mux_input_get_value(struct gpio_chip *gc, unsigned int offset) This looks very nice! We might have to extend this driver at some point. Intuitively I'd say it takes some time and then someone comes along and say "actually we have done this for output as well, using some open drain and stuff" but this is a good starting point anyway we need no big upfront designs. Yours, Linus Walleij