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Date:   Tue, 01 Jun 2021 13:41:57 +0200
From:   Michael Walle <michael@walle.cc>
To:     Linus Walleij <linus.walleij@linaro.org>
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Subject: Re: [PATCH v3 0/6] RTL8231 GPIO expander support
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Am 2021-06-01 12:51, schrieb Linus Walleij:
> On Tue, Jun 1, 2021 at 12:18 PM Michael Walle <michael@walle.cc> wrote:
>> Am 2021-06-01 11:59, schrieb Linus Walleij:
> 
>> > Just regarding all registers/memory cells in a register page
>> > as default volatile (which is what we do a lot of the time)
>> > has its upsides: bugs like this doesn't happen.
>> 
>> I don't think this is the bug here. If it is really a write-only
>> register
>> the problem is the read in RMW. Because reading the register will 
>> return
>> the input value instead of the (previously written) output value.
> 
> True that. Write and read semantics differ on the register.
> 
> Volatile is used for this and some other things,
> like for example interrupts being cleared when a register
> is read so it is strictly read-once.

Isn't that what precious is for?

> So the regmap config is really important to get right.
> 
> IIUC one of the ambitions around Rust is to encode this
> in how memory is specified in the language. (I am still
> thinking about whether that is really a good idea or not.)

-- 
-michael