Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp437149pxj; Wed, 2 Jun 2021 02:59:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxedkeLvUX6azgT+CBQOc72wKvhL2FCz6FwveBXWRvoqOhf/I9EvVuQ6F9REZCLgqNYKDDI X-Received: by 2002:aa7:cc87:: with SMTP id p7mr33148840edt.82.1622627973040; Wed, 02 Jun 2021 02:59:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622627973; cv=none; d=google.com; s=arc-20160816; b=cif2oVOf1YlzkeeXz0f70ZD17UvsmqO21gPGHvj0kqjsABOkTXA4/qOQWZBD4ayqz2 3U070DOj7ekizRaG5FMyBaKtcy4rYmdRGq7aWwlVyhSqVdRUtuYEsl4a5c9+1b/BebN2 fee1yx7GE7Rf4kiMpPmBajlADafG1+PS5pmG0i1g2rGYznP2MXuaebz5jMCgKxc0w8PS ogjwId9lzfofCmUMNRFq0Jo/SFFKna/dAK8X/Hc8XFiaLjblsNSh6b8hupysBSkVjyKT QANyCUAryC6sEDlFOL1YZHEZcaL32C1C8z+UC6zZ2gpPIH6JwpSqGQ+NDeaxyLRFsmVe J6QQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=dj/BMoSTknfVspMdAYY8Dgr7YLlLTe2vxuCbn3sGhr8=; b=yXpenmJk+k7Am/Sv6HUZVgUDwB/QM5qtaRYppXTWKSK8dwmdBsj8gZqXyGJlXqm/zW OE9b4R/FzzePhpCUfOF+G/mncPb0TlbitVfVcMKhPqd/D+a4ujjWLNPa8ZtjA/J/4Fv0 NhI4KiV4wFSQC/cLW3Eo01KjMkysfrBaxYOioxNu6uWbiGjQnt3bNXROa/iRWPyXm2Uj zshBJbGxNR71PEQWCUTIx4PceA/HtEx87eIByl9vNoSyaZfWNyJ28HPhsbAnGPVWQ9Mw jwCjO/ORWyqMPhMIAmGHIzvmKtPv89w7WOrLnV2rm68Zk9MYZLjf/U4V6ZinpNleuEIL w7/g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w13si1647861edx.449.2021.06.02.02.59.10; Wed, 02 Jun 2021 02:59:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231783AbhFBJ15 (ORCPT + 99 others); Wed, 2 Jun 2021 05:27:57 -0400 Received: from muru.com ([72.249.23.125]:35350 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231283AbhFBJ14 (ORCPT ); Wed, 2 Jun 2021 05:27:56 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id D2C858027; Wed, 2 Jun 2021 09:26:18 +0000 (UTC) Date: Wed, 2 Jun 2021 12:26:08 +0300 From: Tony Lindgren To: Sven Peter Cc: Rob Herring , devicetree@vger.kernel.org, linux-clk , linux-arm-kernel , "linux-kernel@vger.kernel.org" , Hector Martin , Michael Turquette , Stephen Boyd , Mark Kettenis , Arnd Bergmann Subject: Re: [PATCH 0/3] Apple M1 clock gate driver Message-ID: References: <20210524182745.22923-1-sven@svenpeter.dev> <9ff6ec26-4b78-4684-9c23-16d5cbfef857@www.fastmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9ff6ec26-4b78-4684-9c23-16d5cbfef857@www.fastmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Sven Peter [210530 11:09]: > Hi, > > On Wed, May 26, 2021, at 09:18, Tony Lindgren wrote: > > Hi, > > > > * Rob Herring [210525 18:09]: > > > I would do a single node per mmio region with the register offset (or > > > offset / 4) being the clock id. This can still support new SoCs easily > > > if you have a fallback compatible. If you want/need to get all the > > > clocks, just walk the DT 'clocks' properties and extract all the IDs. > > > > I mostly agree.. Except I'd also leave out the artificial clock ID and > > just use real register offsets from the clock controller base instead. > > Sure, I'll do that. > > > > > So a single clock controller node for each MMIO range, then set > > #clock=cells = <1>. Then the binding follows what we have for the > > interrupts-extended binding for example. > > > > If the clock controller optionally needs some data in the dts, > > that can be added to the clock controller node. Or it can be driver > > internal built-in data. If the data for dts can be described in a > > generic way, even better :) > > Now the big question is *how* to describe this additional data in the > dts. Essentially I need to specify that e.g. to enable clock 0x270 > I first need to enable the (internal) clocks 0x1c0 and then 0x220. > Are you aware of any generic way to describe this? I'm not even sure > how a sane non-generic way would look like when I just have a single > clock controller node. To me it seems you might be able to recycle the assigned-clocks and assigned-clock-parents etc properties in the clock controller node. Sure the assigned-clocks property will point to clocks in the clock controller itself, and will have tens of entries, but should work :) And sounds like you can generate that list with some script from the Apple dtb. Regards, Tony