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Thu, 3 Jun 2021 07:03:25 +0000 From: Raviteja Narayanam To: "linux@armlinux.org.uk" , "gregkh@linuxfoundation.org" CC: "jslaby@suse.com" , Michal Simek , "linux-serial@vger.kernel.org" , "linux-kernel@vger.kernel.org" , git Subject: Need suggestion for 'access_type' of AMBA pl011 serial driver Thread-Topic: Need suggestion for 'access_type' of AMBA pl011 serial driver Thread-Index: AddYOoJ1+f35KOMhSAyKzX3LNtybFg== Date: Thu, 3 Jun 2021 07:03:25 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: armlinux.org.uk; dkim=none (message not signed) header.d=none;armlinux.org.uk; dmarc=none action=none header.from=xilinx.com; x-originating-ip: [103.106.181.66] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 5a8f5509-0f9e-4b3b-8e6e-08d9265daf03 x-ms-traffictypediagnostic: SN4PR0201MB3439: x-ld-processed: 657af505-d5df-48d0-8300-c31994686c5c,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR02MB4093.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5a8f5509-0f9e-4b3b-8e6e-08d9265daf03 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Jun 2021 07:03:25.7307 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lgSC61khf3opKUT0f+prabYU0IBkGx66LhYx4eHklEnqyNa+blVnMWp4Fac4Fyjs X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN4PR0201MB3439 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, The uart peripheral on Xilinx Versal platform is ARM primecell. Our environment is 32-bit access type but the ARM primecell uart in pl011 d= river has default 16 bit access type.=20 (https://github.com/torvalds/linux/blob/master/drivers/tty/serial/amba-pl01= 1.c#L2665 access_32b is false for 'vendor_arm') This is causing asynchronous abort on our platform when any UART register i= s written from the pl011 driver. Need suggestion on how we can address this issue and if the below approach = is fine. As this is platform specific issue, we can have a new device tree property = (memory_access_type), specifying the 32 bit type. In the probe function, override the behavior (uap->port.iotype) if this pro= perty is present in DT. In this way, we can have support for our SOC, without breaking any legacy o= nes. Regards, Raviteja N