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[23.128.96.18]) by mx.google.com with ESMTP id 5si1791634ejw.423.2021.06.03.02.01.45; Thu, 03 Jun 2021 02:02:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229635AbhFCJBJ (ORCPT + 99 others); Thu, 3 Jun 2021 05:01:09 -0400 Received: from mleia.com ([178.79.152.223]:43340 "EHLO mail.mleia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229486AbhFCJBJ (ORCPT ); Thu, 3 Jun 2021 05:01:09 -0400 Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id 1C96771A8; Thu, 3 Jun 2021 08:59:24 +0000 (UTC) Subject: Re: Need suggestion for 'access_type' of AMBA pl011 serial driver To: Raviteja Narayanam Cc: "jslaby@suse.com" , Michal Simek , "linux-serial@vger.kernel.org" , "linux-kernel@vger.kernel.org" , git , "gregkh@linuxfoundation.org" , "linux@armlinux.org.uk" References: From: Vladimir Zapolskiy Message-ID: <2b602d2f-db48-515c-2904-7b84b31928ce@mleia.com> Date: Thu, 3 Jun 2021 11:59:19 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20210603_085924_139076_8213E3E5 X-CRM114-Status: GOOD ( 13.51 ) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Raviteja, On 6/3/21 10:03 AM, Raviteja Narayanam wrote: > Hi, > > The uart peripheral on Xilinx Versal platform is ARM primecell. Our > environment is 32-bit access type but the ARM primecell uart in pl011 > driver has default 16 bit access type. > (https://github.com/torvalds/linux/blob/master/drivers/tty/serial/amba-pl011.c#L2665 > access_32b is false for 'vendor_arm') This is causing asynchronous > abort on our platform when any UART register is written from the > pl011 driver. > > Need suggestion on how we can address this issue and if the below > approach is fine. Check drivers/tty/serial/amba-pl011.c code, there are quite many controllers with 32-bit access, for instance ZTE UART and SBSA UART. In other words this case is already well covered in the code, nothing extraordinary is required or have to be invented here. > As this is platform specific issue, we can have a new device tree > property (memory_access_type), specifying the 32 bit type. In the > probe function, override the behavior (uap->port.iotype) if this > property is present in DT. In this way, we can have support for our > SOC, without breaking any legacy ones. No, there is totally no need for this kind of a device tree property. Instead please introduce a new compatible of your controller, just like it's been done for the SBSA UART controller: compatible = "arm,sbsa-uart", "arm,pl011", "arm,primecell"; Then based on a match against your new compatible select a proper configuration of the device driver, as I've said above similar cases are already found in the code. -- Best wishes, Vladimir