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Subject: Re: [PATCH 02/10] i2c: xiic: Add standard mode support for > 255 byte
 read transfers
To:     Raviteja Narayanam <rna@xilinx.com>,
        "linux-i2c@vger.kernel.org" <linux-i2c@vger.kernel.org>,
        Michal Simek <michals@xilinx.com>
Cc:     "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        git <git@xilinx.com>
References: <20210531131948.19477-1-raviteja.narayanam@xilinx.com>
 <20210531131948.19477-3-raviteja.narayanam@xilinx.com>
 <0f167c21-6bc7-0806-a536-55658a199a5b@denx.de>
 <SN6PR02MB4093F1992FA306C027D01448CA3C9@SN6PR02MB4093.namprd02.prod.outlook.com>
From:   Marek Vasut <marex@denx.de>
Message-ID: <df5d8f33-1fe0-5760-b19d-300c1f99344e@denx.de>
Date:   Thu, 3 Jun 2021 11:57:20 +0200
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On 6/3/21 7:33 AM, Raviteja Narayanam wrote:
[...]
>>> +	if (i2c->dynamic) {
>>> +		u8 bytes;
>>> +		u16 val;
>>> +
>>> +		/* Clear and enable Rx full interrupt. */
>>> +		xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK |
>>> +				XIIC_INTR_TX_ERROR_MASK);
>>> +
>>> +		/*
>>> +		 * We want to get all but last byte, because the TX_ERROR
>> IRQ
>>> +		 * is used to indicate error ACK on the address, and
>>> +		 * negative ack on the last received byte, so to not mix
>>> +		 * them receive all but last.
>>> +		 * In the case where there is only one byte to receive
>>> +		 * we can check if ERROR and RX full is set at the same time
>>> +		 */
>>> +		rx_watermark = msg->len;
>>> +		bytes = min_t(u8, rx_watermark, IIC_RX_FIFO_DEPTH);
>>> +		bytes--;
>>> +
>>> +		xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, bytes);
>>> +
>>> +		local_irq_save(flags);
>>> +		if (!(msg->flags & I2C_M_NOSTART))
>>> +			/* write the address */
>>> +			xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
>>> +				      i2c_8bit_addr_from_msg(msg) |
>>> +				      XIIC_TX_DYN_START_MASK);
>>> +
>>> +		xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK);
>>> +
>>> +		/* If last message, include dynamic stop bit with length */
>>> +		val = (i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0;
>>> +		val |= msg->len;
>>> +
>>> +		xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, val);
>>> +		local_irq_restore(flags);
>>
>> Is local_irq_save()/local_irq_restore() used here to prevent concurrent
>> access to the XIIC ?
> 
> These were used to fix the timing constraint between two register writes to the IP.
> As we have discussed last time, these are removed in " [PATCH 08/10] i2c: xiic: Remove interrupt enable/disable in Rx path".
> Now they are no longer needed since our IP is fixed.
> For legacy IP versions, driver is switching to 'AXI I2C standard mode' of operation in
> " [PATCH 07/10] i2c: xiic: Switch to Xiic standard mode for i2c-read".

I see, I would expect such fixes to be at the beginning of the series, 
so they can be picked into linux-stable.

In fact, now that you mention the bugfixes which I posted a year ago, 
they also fixed a multitude of locking issues on SMP in the xiic driver. 
Has this series been tested on SMP Zynq or ZynqMP extensively ?