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From:   "Sit, Michael Wei Hong" <michael.wei.hong.sit@intel.com>
To:     Vladimir Oltean <olteanv@gmail.com>
CC:     "Jose.Abreu@synopsys.com" <Jose.Abreu@synopsys.com>,
        "andrew@lunn.ch" <andrew@lunn.ch>,
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        "davem@davemloft.net" <davem@davemloft.net>,
        "mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
        "Voon, Weifeng" <weifeng.voon@intel.com>,
        "Ong, Boon Leong" <boon.leong.ong@intel.com>,
        "Tan, Tee Min" <tee.min.tan@intel.com>,
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Subject: RE: [RESEND PATCH net-next v4 1/3] net: stmmac: split xPCS setup from
 mdio register
Thread-Topic: [RESEND PATCH net-next v4 1/3] net: stmmac: split xPCS setup
 from mdio register
Thread-Index: AQHXWG9Vf0H4HqJeQ0WhvEJpntXirqsCRbMAgAAGNvA=
Date:   Thu, 3 Jun 2021 13:49:20 +0000
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Hi Vladimir,

> -----Original Message-----
> From: Vladimir Oltean <olteanv@gmail.com>
> Sent: Thursday, June 3, 2021 9:21 PM
> To: Sit, Michael Wei Hong <michael.wei.hong.sit@intel.com>
> Cc: Jose.Abreu@synopsys.com; andrew@lunn.ch;
> hkallweit1@gmail.com; linux@armlinux.org.uk; kuba@kernel.org;
> netdev@vger.kernel.org; peppe.cavallaro@st.com;
> alexandre.torgue@foss.st.com; davem@davemloft.net;
> mcoquelin.stm32@gmail.com; Voon, Weifeng
> <weifeng.voon@intel.com>; Ong, Boon Leong
> <boon.leong.ong@intel.com>; Tan, Tee Min
> <tee.min.tan@intel.com>; vee.khee.wong@linux.intel.com;
> Wong, Vee Khee <vee.khee.wong@intel.com>; linux-stm32@st-
> md-mailman.stormreply.com; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [RESEND PATCH net-next v4 1/3] net: stmmac: split
> xPCS setup from mdio register
>=20
> Hi Michael,
>=20
> On Thu, Jun 03, 2021 at 07:50:30PM +0800, Michael Sit Wei Hong
> wrote:
> > From: Voon Weifeng <weifeng.voon@intel.com>
> >
> > This patch is a preparation patch for the enabling of Intel mGbE
> > 2.5Gbps link speed. The Intel mGbR link speed configuration
> (1G/2.5G)
> > is depends on a mdio ADHOC register which can be configured
> in the bios menu.
> > As PHY interface might be different for 1G and 2.5G, the mdio
> bus need
> > be ready to check the link speed and select the PHY interface
> before
> > probing the xPCS.
> >
> > Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
> > Signed-off-by: Michael Sit Wei Hong
> <michael.wei.hong.sit@intel.com>
> > ---
> >  drivers/net/ethernet/stmicro/stmmac/stmmac.h  |  1 +
> > .../net/ethernet/stmicro/stmmac/stmmac_main.c |  7 ++
> > .../net/ethernet/stmicro/stmmac/stmmac_mdio.c | 73
> ++++++++++---------
> >  3 files changed, 46 insertions(+), 35 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> > b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> > index b6cd43eda7ac..fd7212afc543 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> > @@ -311,6 +311,7 @@ enum stmmac_state {  int
> > stmmac_mdio_unregister(struct net_device *ndev);  int
> > stmmac_mdio_register(struct net_device *ndev);  int
> > stmmac_mdio_reset(struct mii_bus *mii);
> > +int stmmac_xpcs_setup(struct mii_bus *mii);
> >  void stmmac_set_ethtool_ops(struct net_device *netdev);
> >
> >  void stmmac_ptp_register(struct stmmac_priv *priv); diff --git
> > a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > index 13720bf6f6ff..eb81baeb13b0 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > @@ -7002,6 +7002,12 @@ int stmmac_dvr_probe(struct device
> *device,
> >  		}
> >  	}
> >
> > +	if (priv->plat->mdio_bus_data->has_xpcs) {
> > +		ret =3D stmmac_xpcs_setup(priv->mii);
> > +		if (ret)
> > +			goto error_xpcs_setup;
> > +	}
> > +
>=20
> I don't understand why this change is necessary?
>=20
> The XPCS probing code was at the end of
> stmmac_mdio_register().
> You moved the code right _after_ stmmac_mdio_register().
> So the code flow is exactly the same.
>=20
Yes, the code flow may look the same, but for intel platforms,
we need to read the mdio ADHOC register to determine the link speed
that is set in the BIOS, after reading the mdio ADHOC register value,
we can determine the link speed and set the appropriate phy_interface
for 1G/2.5G, where 2.5G uses the PHY_INTERFACE_MODE_2500BASEX
and 1G uses the PHY_INTERFACE_MODE_SGMII.

The register reading function is added in between the mdio_register and
xpcs_setup in patch 3 of the series

> >  	ret =3D stmmac_phy_setup(priv);
> >  	if (ret) {
> >  		netdev_err(ndev, "failed to setup phy (%d)\n",
> ret); @@ -7038,6
> > +7044,7 @@ int stmmac_dvr_probe(struct device *device,
> >  	unregister_netdev(ndev);
> >  error_netdev_register:
> >  	phylink_destroy(priv->phylink);
> > +error_xpcs_setup:
> >  error_phy_setup:
> >  	if (priv->hw->pcs !=3D STMMAC_PCS_TBI &&
> >  	    priv->hw->pcs !=3D STMMAC_PCS_RTBI) diff --git
> > a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
> > b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
> > index e293bf1ce9f3..3bb0a787f136 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
> > @@ -397,6 +397,44 @@ int stmmac_mdio_reset(struct mii_bus
> *bus)
> >  	return 0;
> >  }
> >
> > +int stmmac_xpcs_setup(struct mii_bus *bus) {
> > +	int mode, max_addr, addr, found, ret;
> > +	struct net_device *ndev =3D bus->priv;
> > +	struct mdio_xpcs_args *xpcs;
> > +	struct stmmac_priv *priv;
> > +
> > +	priv =3D netdev_priv(ndev);
> > +	xpcs =3D &priv->hw->xpcs_args;
> > +	mode =3D priv->plat->phy_interface;
> > +	max_addr =3D PHY_MAX_ADDR;
> > +
> > +	priv->hw->xpcs =3D mdio_xpcs_get_ops();
> > +	if (!priv->hw->xpcs)
> > +		return -ENODEV;
> > +
> > +	/* Try to probe the XPCS by scanning all addresses. */
> > +	xpcs->bus =3D bus;
> > +	found =3D 0;
> > +
> > +	for (addr =3D 0; addr < max_addr; addr++) {
> > +		xpcs->addr =3D addr;
> > +
> > +		ret =3D stmmac_xpcs_probe(priv, xpcs, mode);
> > +		if (!ret) {
> > +			found =3D 1;
> > +			break;
> > +		}
> > +	}
> > +
> > +	if (!found) {
> > +		dev_warn(priv->device, "No xPCS found\n");
> > +		return -ENODEV;
> > +	}
> > +
> > +	return ret;
> > +}
> > +
> >  /**
> >   * stmmac_mdio_register
> >   * @ndev: net device structure
> > @@ -444,14 +482,6 @@ int stmmac_mdio_register(struct
> net_device *ndev)
> >  		max_addr =3D PHY_MAX_ADDR;
> >  	}
> >
> > -	if (mdio_bus_data->has_xpcs) {
> > -		priv->hw->xpcs =3D mdio_xpcs_get_ops();
> > -		if (!priv->hw->xpcs) {
> > -			err =3D -ENODEV;
> > -			goto bus_register_fail;
> > -		}
> > -	}
> > -
> >  	if (mdio_bus_data->needs_reset)
> >  		new_bus->reset =3D &stmmac_mdio_reset;
> >
> > @@ -509,38 +539,11 @@ int stmmac_mdio_register(struct
> net_device *ndev)
> >  		goto no_phy_found;
> >  	}
> >
> > -	/* Try to probe the XPCS by scanning all addresses. */
> > -	if (priv->hw->xpcs) {
> > -		struct mdio_xpcs_args *xpcs =3D &priv->hw-
> >xpcs_args;
> > -		int ret, mode =3D priv->plat->phy_interface;
> > -		max_addr =3D PHY_MAX_ADDR;
> > -
> > -		xpcs->bus =3D new_bus;
> > -
> > -		found =3D 0;
> > -		for (addr =3D 0; addr < max_addr; addr++) {
> > -			xpcs->addr =3D addr;
> > -
> > -			ret =3D stmmac_xpcs_probe(priv, xpcs,
> mode);
> > -			if (!ret) {
> > -				found =3D 1;
> > -				break;
> > -			}
> > -		}
> > -
> > -		if (!found && !mdio_node) {
> > -			dev_warn(dev, "No XPCS found\n");
> > -			err =3D -ENODEV;
> > -			goto no_xpcs_found;
> > -		}
> > -	}
> > -
> >  bus_register_done:
> >  	priv->mii =3D new_bus;
> >
> >  	return 0;
> >
> > -no_xpcs_found:
> >  no_phy_found:
> >  	mdiobus_unregister(new_bus);
> >  bus_register_fail:
> > --
> > 2.17.1
> >