Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp302379pxj; Thu, 3 Jun 2021 07:07:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz64ZeYirT1zbt/gCxVnC7LBVCZcIqMjQ9BLvL4R+vqkJy+XxkcUstt8QvTN0EXMxEVGgyF X-Received: by 2002:adf:e507:: with SMTP id j7mr176294wrm.178.1622729225818; Thu, 03 Jun 2021 07:07:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622729225; cv=none; d=google.com; s=arc-20160816; b=JMrHukBTXL95kOEk2lOvxOv+bRYGnkhkKXZzm17RcA23bYlJlvEh2vBA4986rpJwFS 2sdmgPWP/GwbLEfJybwWF1g8XRcUqP7VjOQeDfRuVlwtHyHOyAR4soTQYEUkonWVJeyV UYTDPbuyvxInrofb/sqk7EKjeLgUaYuw+AnCF5CwOwFnvB9YLfq3c9UiexsTf+LLzLmR rujrKuFWv1m0uPBOkBjvW07l1uMA1Fxi6DUIT6vX7bqnbhHZV1GxYAgt3+pgZN3M3H/N 1Nk3SuRGo7TZrq5wRFZuZjqL3PiAQ2HJ9VAOYrEDHR8nY98ksw+d1j1JoD338VD2BQk/ vZQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=+F4TYRlKaPioKXq/PeE5dbOcDH3xCZTOmCks5Pjeaeg=; b=A95RJR6TbUsolQ3Zu9Z3KBEBkk92k+NrffdAZeMfDcyVfNCeJGYE60KjmcNnWCcz+B /Oq1WHp1t/u86wsaUYu10vU1Jj00qDKw3CFFit97MMsEpDjgBIM7Q5G3ILX1w7uFKKo/ f/QhhxJCXRWHYb3vNkKzQkCyMoQ7d93PTvN7NU9EzIfSx+odleYkiuIJC04DDj+UuzJx iKQ+mM12i3HrQJZc+CysDLRnBCLytK4Yikp8QMIpol0wIm6R1OsUeNrdFJ15BV2hzUYR XIc+h3FOHV4FEkwgv1kAua9fAsTu8cJGPZ10e6XLUdxXGlwT7bGIEC+Pc6VmCd+p9pNR nx8w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=o1A+oRPk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bo19si2414164edb.416.2021.06.03.07.06.42; Thu, 03 Jun 2021 07:07:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=o1A+oRPk; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231535AbhFCOF5 (ORCPT + 99 others); Thu, 3 Jun 2021 10:05:57 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:43260 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229967AbhFCOF4 (ORCPT ); Thu, 3 Jun 2021 10:05:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=+F4TYRlKaPioKXq/PeE5dbOcDH3xCZTOmCks5Pjeaeg=; b=o1A+oRPk1Yoi2i1p2TF/mhhyl+ 5w9RjXPqbXxgDyv5484mlhlvNJcMAXhKdQ62NSzaiALuAMCrvp00ZyfXs4A1m3NO+o/iWZwJlVbJp mSqirkz8AKpsUrIDX/16Zw8lWeX7boE3PwLAHdU+qw2XGEOghKeUVqBvowXiJytPrp/M=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1lonx1-007d6E-Tn; Thu, 03 Jun 2021 16:03:59 +0200 Date: Thu, 3 Jun 2021 16:03:59 +0200 From: Andrew Lunn To: Sander Vanheule Cc: Andy Shevchenko , Pavel Machek , Rob Herring , Lee Jones , Linus Walleij , Michael Walle , Linux LED Subsystem , devicetree , "open list:GPIO SUBSYSTEM" , Hans de Goede , Linux Kernel Mailing List Subject: Re: [PATCH v4 3/5] mfd: Add RTL8231 core device Message-ID: References: <56fb027587fa067a249237ecaf40828cd508cdcc.1622713678.git.sander@svanheule.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > I wanted to make the masking explicit, but since regmap-mdio currently requires > a register address width of 5 bit, it could move there. > > Actually, can we safely assume that any MDIO driver implementing clause-22 > access (5-bit register address width) will just ignore higher bits? In that > case, I could just drop these functions and not even modify regmap-mdio. It > appears to work for bitbanged MDIO. How are C45 addresses handled? The API to the MDIO bus driver uses a register value which is 32 bits in width. Bit 30 indicates the address is a C45 address, and then you have 21 bits of actual address. regmap-mdio needs to be generic and support both C22 and C45. Andrew