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[23.128.96.18]) by mx.google.com with ESMTP id p12si267003ejn.260.2021.06.03.07.27.07; Thu, 03 Jun 2021 07:27:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xjL04UUg; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231673AbhFCOZN (ORCPT + 99 others); Thu, 3 Jun 2021 10:25:13 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:52916 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231660AbhFCOZK (ORCPT ); Thu, 3 Jun 2021 10:25:10 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 153ENMjn097054; Thu, 3 Jun 2021 09:23:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1622730202; bh=V2SYb6iVrzLpJErT4w9okAsZWhph98sXEr/gFZPp6LA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xjL04UUgFS0AnpIXzo1uwLEWrBxZDdiG3XDaLtr3Fh0SV1PqDcFTpCvY9vhgLMdJA o1E7L+TuJXU4nvO1Ix1l6/D1A11YEa2xFfZt6mNWEayCAYBaQ/y1DIghz6RZLdYszD 0VGWEjJfOZZMRD3wJM/uqi4Kvd0tNN4HbzrYgJag= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 153ENMuF015120 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 3 Jun 2021 09:23:22 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Thu, 3 Jun 2021 09:23:22 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Thu, 3 Jun 2021 09:23:22 -0500 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 153EMpNK039957; Thu, 3 Jun 2021 09:23:17 -0500 From: Kishon Vijay Abraham I To: Nishanth Menon , Tero Kristo , Rob Herring CC: , , , Kishon Vijay Abraham I , Lokesh Vutla , Subject: [PATCH v4 5/5] arm64: dts: ti: k3-am642-sk: Disable PCIe Date: Thu, 3 Jun 2021 19:52:51 +0530 Message-ID: <20210603142251.14563-6-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210603142251.14563-1-kishon@ti.com> References: <20210603142251.14563-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AM642-SK has no PCIe slot. Disable it here. Signed-off-by: Kishon Vijay Abraham I --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 077b87656fbc..40124007259d 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -367,3 +367,11 @@ &mailbox0_cluster7 { status = "disabled"; }; + +&pcie0_rc { + status = "disabled"; +}; + +&pcie0_ep { + status = "disabled"; +}; -- 2.17.1