Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp335015pxj; Thu, 3 Jun 2021 07:53:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy29pdhQow1cQCyWtF+TlIeficjxEH39pl+enudQk1AHNJr3nYR29gMT6aQFIL2D0GOhroo X-Received: by 2002:a17:906:8345:: with SMTP id b5mr20657ejy.14.1622731995638; Thu, 03 Jun 2021 07:53:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622731995; cv=none; d=google.com; s=arc-20160816; b=qn3sGSL7BHF7dz4QbgVV4dcSB3iQSiEcRfR2772JPlO0pTEXNISRQOUAoKRUB3yxWP fZ4+kDtw+xKW+Y/Og/8Es5RNxg+wXCAgLVn1TUN1XciX3m8G1jomrfHE5LdDpfO8KOGn qRLYvmuTBtK+5k7+/NSFNZ25p2QDW4txVW8ARydUOyaGaQEZuqodXFTIxdqhPlB9aA99 uwuuDj84VL4o7UKXVcmoVjPmdxDYejqPBqcyINvMeGEVq8TJQ3KTTvXSS7Hn39f/hygO bNz60s1zkU5Omv/i2kWeO8OOFygVvryNnpst6TBbwcaMRrWdCQlLvEAuSvHEH+JrkvBL z3Rg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:mail-followup-to :message-id:subject:cc:to:from:date; bh=sQFpZycSNzmxj7BdA+i/rFWMXGgvxfT83WRGjkhvCRY=; b=cs82hL+RnsRPzp3KRcWci5MkgcXooIHjb+pho0O2jN7GH2mkF0/TtZxRRXNK5ay6My R+a/YCkGTKOCGrp+zVp1xSni7rPXin5w+2ZeR5Gbokx+AthhNuPhQ479qZOUUROi5ER4 oHcO4tXYExc0sUuDPFzrXTZ6ThvdY85EBzBylwHB857d6MmqtHgwnBYGfI+7Upl5qQ4J FmToRu3DTKA9ZMpCG2M1KDPFTXWyeU0QHwpp6WSU4USs7kx07FVKFhnA8i9TqYF+t8XL f7jJ4zge3qFoxkSDt3pzwKhhDdT5tNzsoP7FtbtlT7tn+MvrEQr+gSS7bU8oco3pGhc1 0h+g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nc10si2059960ejc.734.2021.06.03.07.52.52; Thu, 03 Jun 2021 07:53:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231328AbhFCOvK (ORCPT + 99 others); Thu, 3 Jun 2021 10:51:10 -0400 Received: from mx01.ayax.eu ([188.137.98.110]:41138 "EHLO mx01.ayax.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230138AbhFCOvJ (ORCPT ); Thu, 3 Jun 2021 10:51:09 -0400 Received: from [192.168.192.146] (port=48238 helo=nx64de-df6d00) by mx01.ayax.eu with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1looeo-0005Ut-DI; Thu, 03 Jun 2021 16:49:14 +0200 Date: Thu, 3 Jun 2021 16:49:13 +0200 From: Grzegorz Szymaszek To: Ahmad Fatoum Cc: Grzegorz Szymaszek , Alexandre Torgue , Maxime Coquelin , Marcin Sloniewski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: Re: [PATCH] ARM: dts: stm32: set stm32mp157c-odyssey DCMI pins Message-ID: Mail-Followup-To: Grzegorz Szymaszek , Ahmad Fatoum , Alexandre Torgue , Maxime Coquelin , Marcin Sloniewski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Ahmad, On Thu, Jun 03, 2021 at 04:26:59PM +0200, Ahmad Fatoum wrote: > On 03.06.21 16:23, Grzegorz Szymaszek wrote: > > The Seeed Odyssey-STM32MP157C board has a 20-pin DVP camera output. > > stm32mp15-pinctrl.dtsi contains one pin state definition for the DCMI > > interface, dcmi-0, AKA phandle dcmi_pins_a. This definition is > > incompatible with the pins used on the Odyssey board, where: > > - there are 8 data pins instead of 12, > > - […] > > > > Override the dcmi_pins_a definition (as well as dcmi_sleep_pins_a) in > > the Odyssey device tree. > > Rather define a new pinctrl group (e.g. &dcmi_pins_b) and use that > instead of overriding an existing one. Can I simply use dcmi_pins_b (as the first unused identifier) or is there some way to match specific pin groups to an identifier (b, c, d, and so on)? > Current convention is also to place all STM32MP1 pinctrl nodes into > a central file, not in the individual board device trees. Sure, I will update the patch. Thanks for your comments! -- Grzegorz