Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Subject: Re: [PATCH] clk: meson: g12a: Add missing NNA source clocks for g12b
To:     xieqinick@gmail.com, jbrunet@baylibre.com, mturquette@baylibre.com,
        sboyd@kernel.org, khilman@baylibre.com,
        martin.blumenstingl@googlemail.com,
        linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc:     nick@khadas.com, artem@khadas.com
References: <20210604032957.224496-1-xieqinick@gmail.com>
From:   Neil Armstrong <narmstrong@baylibre.com>
Message-ID: <2288650e-316a-3534-21a7-9962796b7d1a@baylibre.com>
Date:   Fri, 4 Jun 2021 08:26:00 +0200
User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.14; rv:78.0)
 Gecko/20100101 Thunderbird/78.10.0
MIME-Version: 1.0
In-Reply-To: <20210604032957.224496-1-xieqinick@gmail.com>
Content-Type: text/plain; charset=utf-8
Content-Language: fr
Content-Transfer-Encoding: 8bit
Precedence: bulk

Hi,

Le 04/06/2021 à 05:29, xieqinick@gmail.com a écrit :
> From: Nick Xie <nick@khadas.com>
> 
> This adds the Neural Network Accelerator source clocks for g12b.
> 
> Initial support for sm1 already exist in
> commit 2f1efa5340ef
> ("clk: meson: g12a: Add support for NNA CLK source clocks")
> 
> The sm1 and g12b share the same NNA source clocks.
> This patch add missing NNA clocks for A311D (g12b).
> 
> Signed-off-by: Nick Xie <nick@khadas.com>
> ---
>  drivers/clk/meson/g12a.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
> index b080359b4645..6a1db16b126f 100644
> --- a/drivers/clk/meson/g12a.c
> +++ b/drivers/clk/meson/g12a.c
> @@ -4723,6 +4723,12 @@ static struct clk_hw_onecell_data g12b_hw_onecell_data = {
>  		[CLKID_SPICC1_SCLK_SEL]		= &g12a_spicc1_sclk_sel.hw,
>  		[CLKID_SPICC1_SCLK_DIV]		= &g12a_spicc1_sclk_div.hw,
>  		[CLKID_SPICC1_SCLK]		= &g12a_spicc1_sclk.hw,
> +		[CLKID_NNA_AXI_CLK_SEL]		= &sm1_nna_axi_clk_sel.hw,
> +		[CLKID_NNA_AXI_CLK_DIV]		= &sm1_nna_axi_clk_div.hw,
> +		[CLKID_NNA_AXI_CLK]		= &sm1_nna_axi_clk.hw,
> +		[CLKID_NNA_CORE_CLK_SEL]	= &sm1_nna_core_clk_sel.hw,
> +		[CLKID_NNA_CORE_CLK_DIV]	= &sm1_nna_core_clk_div.hw,
> +		[CLKID_NNA_CORE_CLK]		= &sm1_nna_core_clk.hw,
>  		[CLKID_MIPI_DSI_PXCLK_SEL]	= &g12a_mipi_dsi_pxclk_sel.hw,
>  		[CLKID_MIPI_DSI_PXCLK_DIV]	= &g12a_mipi_dsi_pxclk_div.hw,
>  		[CLKID_MIPI_DSI_PXCLK]		= &g12a_mipi_dsi_pxclk.hw,
> 

Acked-by: Neil Armstrong <narmstrong@baylibre.com>

Thanks,
Neil