Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp977833pxj; Fri, 4 Jun 2021 03:05:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJziV/FgIXfjcFgR41EE0BHzIHWFYC2kRS8AcDW9i76nIpTsbdLmhWLC/wlqKGcvkjGs5q2u X-Received: by 2002:aa7:d2d4:: with SMTP id k20mr3755500edr.384.1622801151183; Fri, 04 Jun 2021 03:05:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622801151; cv=none; d=google.com; s=arc-20160816; b=pNuzaYQ0EBW5TtJZWm+knRyuVXUj1EHBahLOVcA3GTCpf49m5yaWRmFllrIeupl+UL Ywq9qD1jtNg1+NsOuTefUFsFVjrvV7fSmRWMO7wkwAM/LUncnltdtgXArwieQFHoeOFn MpzoEXeD1WXJHPJ99Ms9BLm42Pv01kIFqstRnYK6ZO6BboBIKUGuTjEj5Rq1wwFN4jTR wbZz9hKg2xC4OcursKBGz1D3wycj0KH+64/w8zLbHcNkXArGKYs8C43pORY6XNtZl9hE UNLStXJdsQLvRLmEed7Jo3GpyruQ7eL+SPgznBMWdJxGPOlAqqXDHZy7lx5FbhFPitmW CV/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=Tg3iJqtwPKwVa4Mt0ClhqMfxpaFjgBS4gMilyfqRJn4=; b=f2IPkH1P52/6vJFBDSpBzi3HLnag1SSehACusSumCxH+fhvUxsQ3hwSZFZG757WMX5 dqB2sBuxXd0Sh2NlWI5Amfm919lFKsZpxn5IuwPWWWYfCCql2NNRp9PxGPg/TXdlJ+18 +kunQ7KX54+R+F6YcFKHd6/zc6GjWJc25fPRwAqaLXoAfc8u0qk8tI1kV/MR4MzY1n2V IGYnBzzflYhEiQA9RI+gO3PpCNiAS0HWl11rtsOMoKCbw/OoLz8M40fx2tZckJSAnj5L Sj6XJSEBCQRn1CWqmSJN2xDWaXGy02lIJVx5lEBTuwJJsc3c4Ltsc6ANlmsGWjQPn4Ze 4qMg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f1si4008248ejh.93.2021.06.04.03.05.27; Fri, 04 Jun 2021 03:05:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230149AbhFDKFh (ORCPT + 99 others); Fri, 4 Jun 2021 06:05:37 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:55775 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S230321AbhFDKFc (ORCPT ); Fri, 4 Jun 2021 06:05:32 -0400 X-UUID: b6dfb27ac575413a905bced22ab0c820-20210604 X-UUID: b6dfb27ac575413a905bced22ab0c820-20210604 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1002846354; Fri, 04 Jun 2021 18:02:27 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Jun 2021 18:02:25 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Jun 2021 18:02:25 +0800 From: Dawei Chien To: Georgi Djakov , Rob Herring , Matthias Brugger , Stephen Boyd , Ryan Case CC: Mark Rutland , Nicolas Boichat , , , , , , Fan Chen , Arvin Wang , James Liao , Henry Chen , Dawei Chien Subject: [PATCH V10 06/12] arm64: dts: mt8192: add dvfsrc related nodes Date: Fri, 4 Jun 2021 18:02:12 +0800 Message-ID: <20210604100218.13613-7-dawei.chien@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210604100218.13613-1-dawei.chien@mediatek.com> References: <20210604100218.13613-1-dawei.chien@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Henry Chen Enable dvfsrc on mt8192 platform. Signed-off-by: Henry Chen Signed-off-by: Dawei Chien --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 9757138a8bbd..c70a3bf744fa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -282,6 +282,12 @@ #interrupt-cells = <2>; }; + ddr_emi: dvfsrc@10012000 { + compatible = "mediatek,mt8192-dvfsrc", + "mediatek,mt6873-dvfsrc"; + reg = <0 0x10012000 0 0x1000>; + }; + systimer: timer@10017000 { compatible = "mediatek,mt8192-timer", "mediatek,mt6765-timer"; -- 2.14.1